Search

Tan V Mai

Examiner (ID: 15743, Phone: (571)272-3726 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2306, 2193, 2787, 2786, 2121, 2124, 2302, 2301, 2182, 2183
Total Applications
3863
Issued Applications
3431
Pending Applications
94
Abandoned Applications
349

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4659152 [patent_doc_number] => 20080028014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-31 [patent_title] => 'N-BIT 2\'s COMPLEMENT SYMMETRIC ROUNDING METHOD AND LOGIC FOR IMPLEMENTING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/459993 [patent_app_country] => US [patent_app_date] => 2006-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3133 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20080028014.pdf [firstpage_image] =>[orig_patent_app_number] => 11459993 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/459993
N-BIT 2's COMPLEMENT SYMMETRIC ROUNDING METHOD AND LOGIC FOR IMPLEMENTING THE SAME Jul 25, 2006 Abandoned
Array ( [id] => 4997955 [patent_doc_number] => 20070040589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-22 [patent_title] => 'Signal generating circuit' [patent_app_type] => utility [patent_app_number] => 11/492047 [patent_app_country] => US [patent_app_date] => 2006-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1282 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20070040589.pdf [firstpage_image] =>[orig_patent_app_number] => 11492047 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/492047
Signal generating circuit Jul 24, 2006 Abandoned
Array ( [id] => 5150375 [patent_doc_number] => 20070050435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Leading-Zero Counter and Method to Count Leading Zeros' [patent_app_type] => utility [patent_app_number] => 11/459663 [patent_app_country] => US [patent_app_date] => 2006-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3665 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20070050435.pdf [firstpage_image] =>[orig_patent_app_number] => 11459663 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/459663
Leading-Zero Counter and Method to Count Leading Zeros Jul 24, 2006 Abandoned
Array ( [id] => 5001163 [patent_doc_number] => 20070043797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-22 [patent_title] => 'APPARATUS FOR PROVIDING A RANDOM BIT STREAM' [patent_app_type] => utility [patent_app_number] => 11/459096 [patent_app_country] => US [patent_app_date] => 2006-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5067 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20070043797.pdf [firstpage_image] =>[orig_patent_app_number] => 11459096 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/459096
Apparatus for providing a random bit stream Jul 20, 2006 Issued
Array ( [id] => 5001168 [patent_doc_number] => 20070043802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-22 [patent_title] => 'Multiplication circuitry' [patent_app_type] => utility [patent_app_number] => 11/490475 [patent_app_country] => US [patent_app_date] => 2006-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7638 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20070043802.pdf [firstpage_image] =>[orig_patent_app_number] => 11490475 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/490475
Multiplication circuitry Jul 19, 2006 Issued
Array ( [id] => 5146452 [patent_doc_number] => 20070046506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Multiplication circuitry' [patent_app_type] => utility [patent_app_number] => 11/490533 [patent_app_country] => US [patent_app_date] => 2006-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5389 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20070046506.pdf [firstpage_image] =>[orig_patent_app_number] => 11490533 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/490533
Multiplication circuitry Jul 19, 2006 Abandoned
Array ( [id] => 179874 [patent_doc_number] => 07657588 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-02 [patent_title] => 'Detection and identification of stable PRI patterns using multiple parallel hypothesis correlation algorithms' [patent_app_type] => utility [patent_app_number] => 11/458963 [patent_app_country] => US [patent_app_date] => 2006-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 12024 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/657/07657588.pdf [firstpage_image] =>[orig_patent_app_number] => 11458963 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/458963
Detection and identification of stable PRI patterns using multiple parallel hypothesis correlation algorithms Jul 19, 2006 Issued
Array ( [id] => 5734415 [patent_doc_number] => 20060259532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-16 [patent_title] => 'Discrete filter having a tap selection circuit' [patent_app_type] => utility [patent_app_number] => 11/488566 [patent_app_country] => US [patent_app_date] => 2006-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2680 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0259/20060259532.pdf [firstpage_image] =>[orig_patent_app_number] => 11488566 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/488566
Discrete filter having a tap selection circuit Jul 17, 2006 Issued
Array ( [id] => 7591529 [patent_doc_number] => 07653678 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-26 [patent_title] => 'Direct digital synthesis circuit' [patent_app_type] => utility [patent_app_number] => 11/457380 [patent_app_country] => US [patent_app_date] => 2006-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5878 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/653/07653678.pdf [firstpage_image] =>[orig_patent_app_number] => 11457380 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/457380
Direct digital synthesis circuit Jul 12, 2006 Issued
Array ( [id] => 7532423 [patent_doc_number] => 07844656 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-30 [patent_title] => 'Systems, methods and apparatus for factoring numbers' [patent_app_type] => utility [patent_app_number] => 11/484368 [patent_app_country] => US [patent_app_date] => 2006-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 15402 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/844/07844656.pdf [firstpage_image] =>[orig_patent_app_number] => 11484368 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/484368
Systems, methods and apparatus for factoring numbers Jul 9, 2006 Issued
Array ( [id] => 813054 [patent_doc_number] => 07418469 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-26 [patent_title] => 'Method and apparatus for adaptive real-time signal conditioning, processing, analysis, quantification, comparison, and control' [patent_app_type] => utility [patent_app_number] => 11/483751 [patent_app_country] => US [patent_app_date] => 2006-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 29 [patent_no_of_words] => 16896 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/418/07418469.pdf [firstpage_image] =>[orig_patent_app_number] => 11483751 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/483751
Method and apparatus for adaptive real-time signal conditioning, processing, analysis, quantification, comparison, and control Jul 9, 2006 Issued
Array ( [id] => 5437470 [patent_doc_number] => 20090172057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'Computer system for predicting the evolution of a chronological set of numerical values' [patent_app_type] => utility [patent_app_number] => 11/988624 [patent_app_country] => US [patent_app_date] => 2006-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3455 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20090172057.pdf [firstpage_image] =>[orig_patent_app_number] => 11988624 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/988624
Computer system for predicting the evolution of a chronological set of numerical values Jul 6, 2006 Issued
Array ( [id] => 5407875 [patent_doc_number] => 20090121773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-14 [patent_title] => 'SAMPLING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/994785 [patent_app_country] => US [patent_app_date] => 2006-07-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 12991 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20090121773.pdf [firstpage_image] =>[orig_patent_app_number] => 11994785 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/994785
Sampling circuit Jul 3, 2006 Issued
Array ( [id] => 4471579 [patent_doc_number] => 07937426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-03 [patent_title] => 'Interval generation for numeric data' [patent_app_type] => utility [patent_app_number] => 11/479590 [patent_app_country] => US [patent_app_date] => 2006-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6478 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/937/07937426.pdf [firstpage_image] =>[orig_patent_app_number] => 11479590 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/479590
Interval generation for numeric data Jun 29, 2006 Issued
Array ( [id] => 7532422 [patent_doc_number] => 07844655 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-30 [patent_title] => 'System, method and apparatus for multiplying large numbers in a single iteration using graphs' [patent_app_type] => utility [patent_app_number] => 11/477995 [patent_app_country] => US [patent_app_date] => 2006-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 16655 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/844/07844655.pdf [firstpage_image] =>[orig_patent_app_number] => 11477995 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/477995
System, method and apparatus for multiplying large numbers in a single iteration using graphs Jun 27, 2006 Issued
Array ( [id] => 5200581 [patent_doc_number] => 20070299899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-27 [patent_title] => 'Mulptiplying two numbers' [patent_app_type] => utility [patent_app_number] => 11/476329 [patent_app_country] => US [patent_app_date] => 2006-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4356 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0299/20070299899.pdf [firstpage_image] =>[orig_patent_app_number] => 11476329 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/476329
Multiplying two numbers Jun 26, 2006 Issued
Array ( [id] => 4575218 [patent_doc_number] => 07822799 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-10-26 [patent_title] => 'Adder-rounder circuitry for specialized processing block in programmable logic device' [patent_app_type] => utility [patent_app_number] => 11/426403 [patent_app_country] => US [patent_app_date] => 2006-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 7495 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/822/07822799.pdf [firstpage_image] =>[orig_patent_app_number] => 11426403 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/426403
Adder-rounder circuitry for specialized processing block in programmable logic device Jun 25, 2006 Issued
Array ( [id] => 5200583 [patent_doc_number] => 20070299901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-27 [patent_title] => 'DIVISION UNIT, IMAGE ANALYSIS UNIT AND DISPLAY APPARATUS USING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/425695 [patent_app_country] => US [patent_app_date] => 2006-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3305 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0299/20070299901.pdf [firstpage_image] =>[orig_patent_app_number] => 11425695 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/425695
DIVISION UNIT, IMAGE ANALYSIS UNIT AND DISPLAY APPARATUS USING THE SAME Jun 20, 2006 Abandoned
Array ( [id] => 5232222 [patent_doc_number] => 20070294330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-20 [patent_title] => 'SYSTEMS, METHODS AND COMPUTER PROGRAM PRODUCTS FOR PROVIDING A COMBINED MODULI-9 AND 3 RESIDUE GENERATOR' [patent_app_type] => utility [patent_app_number] => 11/425185 [patent_app_country] => US [patent_app_date] => 2006-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3971 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20070294330.pdf [firstpage_image] =>[orig_patent_app_number] => 11425185 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/425185
Systems, methods and computer program products for providing a combined moduli-9 and 3 residue generator Jun 19, 2006 Issued
Array ( [id] => 5689747 [patent_doc_number] => 20060288062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-21 [patent_title] => 'QUANTUM RANDOM NUMBER GENERATORS' [patent_app_type] => utility [patent_app_number] => 11/424808 [patent_app_country] => US [patent_app_date] => 2006-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 9711 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0288/20060288062.pdf [firstpage_image] =>[orig_patent_app_number] => 11424808 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/424808
QUANTUM RANDOM NUMBER GENERATORS Jun 15, 2006 Abandoned
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