Search

Tan V. Mai

Examiner (ID: 15743)

Most Active Art Unit
2193
Art Unit(s)
2306, 2193, 2787, 2786, 2121, 2124, 2302, 2301, 2182, 2183
Total Applications
3863
Issued Applications
3431
Pending Applications
94
Abandoned Applications
349

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5127538 [patent_doc_number] => 20070239809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'Method for calculating a local extremum, preferably a local minimum, of a multidimensional function E(x1, x2, ..., xn)' [patent_app_type] => utility [patent_app_number] => 11/398681 [patent_app_country] => US [patent_app_date] => 2006-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3897 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20070239809.pdf [firstpage_image] =>[orig_patent_app_number] => 11398681 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/398681
Method for calculating a local extremum, preferably a local minimum, of a multidimensional function E(x1, x2, ..., xn) Apr 5, 2006 Abandoned
Array ( [id] => 220060 [patent_doc_number] => 07613755 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-11-03 [patent_title] => 'Signature searching system' [patent_app_type] => utility [patent_app_number] => 11/397308 [patent_app_country] => US [patent_app_date] => 2006-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4555 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/613/07613755.pdf [firstpage_image] =>[orig_patent_app_number] => 11397308 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/397308
Signature searching system Apr 2, 2006 Issued
Array ( [id] => 86332 [patent_doc_number] => 07747669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-29 [patent_title] => 'Rounding of binary integers' [patent_app_type] => utility [patent_app_number] => 11/394735 [patent_app_country] => US [patent_app_date] => 2006-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6137 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/747/07747669.pdf [firstpage_image] =>[orig_patent_app_number] => 11394735 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/394735
Rounding of binary integers Mar 30, 2006 Issued
Array ( [id] => 5788536 [patent_doc_number] => 20060206548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Comparator unit for comparing values of floating point operands' [patent_app_type] => utility [patent_app_number] => 11/394081 [patent_app_country] => US [patent_app_date] => 2006-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7647 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20060206548.pdf [firstpage_image] =>[orig_patent_app_number] => 11394081 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/394081
Comparator unit for comparing values of floating point operands Mar 30, 2006 Issued
Array ( [id] => 5927558 [patent_doc_number] => 20060242215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-26 [patent_title] => 'Circuit for selectively providing maximum or minimum of a pair of floating point operands' [patent_app_type] => utility [patent_app_number] => 11/394080 [patent_app_country] => US [patent_app_date] => 2006-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 11966 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20060242215.pdf [firstpage_image] =>[orig_patent_app_number] => 11394080 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/394080
Circuit for selectively providing maximum or minimum of a pair of floating point operands Mar 30, 2006 Issued
Array ( [id] => 5124981 [patent_doc_number] => 20070237252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'Parallel systolic CORDIC algorithm with reduced latency for unitary transform of complex matrices and application to MIMO detection' [patent_app_type] => utility [patent_app_number] => 11/394898 [patent_app_country] => US [patent_app_date] => 2006-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6743 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20070237252.pdf [firstpage_image] =>[orig_patent_app_number] => 11394898 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/394898
Parallel systolic CORDIC algorithm with reduced latency for unitary transform of complex matrices and application to MIMO detection Mar 30, 2006 Issued
Array ( [id] => 9049073 [patent_doc_number] => 08543631 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-24 [patent_title] => 'Total order comparator unit for comparing values of two floating point operands' [patent_app_type] => utility [patent_app_number] => 11/394083 [patent_app_country] => US [patent_app_date] => 2006-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 12315 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11394083 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/394083
Total order comparator unit for comparing values of two floating point operands Mar 30, 2006 Issued
Array ( [id] => 146370 [patent_doc_number] => 07693926 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-06 [patent_title] => 'Modular multiplication acceleration circuit and method for data encryption/decryption' [patent_app_type] => utility [patent_app_number] => 11/393392 [patent_app_country] => US [patent_app_date] => 2006-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2508 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/693/07693926.pdf [firstpage_image] =>[orig_patent_app_number] => 11393392 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/393392
Modular multiplication acceleration circuit and method for data encryption/decryption Mar 29, 2006 Issued
Array ( [id] => 47251 [patent_doc_number] => 07783690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-24 [patent_title] => 'Electronic circuit for implementing a permutation operation' [patent_app_type] => utility [patent_app_number] => 11/390791 [patent_app_country] => US [patent_app_date] => 2006-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3237 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/783/07783690.pdf [firstpage_image] =>[orig_patent_app_number] => 11390791 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/390791
Electronic circuit for implementing a permutation operation Mar 27, 2006 Issued
Array ( [id] => 155834 [patent_doc_number] => 07685216 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-23 [patent_title] => 'Automatic input error recovery circuit and method for recursive digital filters' [patent_app_type] => utility [patent_app_number] => 11/389943 [patent_app_country] => US [patent_app_date] => 2006-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 8247 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/685/07685216.pdf [firstpage_image] =>[orig_patent_app_number] => 11389943 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/389943
Automatic input error recovery circuit and method for recursive digital filters Mar 26, 2006 Issued
Array ( [id] => 4521323 [patent_doc_number] => 07917564 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-29 [patent_title] => 'Device and method for processing a signal having a sequence of discrete values' [patent_app_type] => utility [patent_app_number] => 11/388186 [patent_app_country] => US [patent_app_date] => 2006-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 24 [patent_no_of_words] => 17697 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/917/07917564.pdf [firstpage_image] =>[orig_patent_app_number] => 11388186 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/388186
Device and method for processing a signal having a sequence of discrete values Mar 22, 2006 Issued
Array ( [id] => 116098 [patent_doc_number] => 07720899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-18 [patent_title] => 'Arithmetic operation unit, information processing apparatus and arithmetic operation method' [patent_app_type] => utility [patent_app_number] => 11/385718 [patent_app_country] => US [patent_app_date] => 2006-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 13492 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/720/07720899.pdf [firstpage_image] =>[orig_patent_app_number] => 11385718 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/385718
Arithmetic operation unit, information processing apparatus and arithmetic operation method Mar 21, 2006 Issued
Array ( [id] => 96908 [patent_doc_number] => 07739324 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-06-15 [patent_title] => 'Timing driven synthesis of sum-of-product functional blocks' [patent_app_type] => utility [patent_app_number] => 11/387470 [patent_app_country] => US [patent_app_date] => 2006-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 8475 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/739/07739324.pdf [firstpage_image] =>[orig_patent_app_number] => 11387470 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/387470
Timing driven synthesis of sum-of-product functional blocks Mar 21, 2006 Issued
Array ( [id] => 107253 [patent_doc_number] => 07725514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-25 [patent_title] => 'Liquid and plate-based random number generator' [patent_app_type] => utility [patent_app_number] => 11/385547 [patent_app_country] => US [patent_app_date] => 2006-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1914 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/725/07725514.pdf [firstpage_image] =>[orig_patent_app_number] => 11385547 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/385547
Liquid and plate-based random number generator Mar 20, 2006 Issued
Array ( [id] => 4978842 [patent_doc_number] => 20070220077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'Frequency float method and system for realizing a signal filter' [patent_app_type] => utility [patent_app_number] => 11/385106 [patent_app_country] => US [patent_app_date] => 2006-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6756 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20070220077.pdf [firstpage_image] =>[orig_patent_app_number] => 11385106 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/385106
Frequency float method and system for realizing a signal filter Mar 19, 2006 Issued
Array ( [id] => 135949 [patent_doc_number] => 07702701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-20 [patent_title] => 'Low-power random bit generator using thermal noise and method thereof' [patent_app_type] => utility [patent_app_number] => 11/362633 [patent_app_country] => US [patent_app_date] => 2006-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1395 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/702/07702701.pdf [firstpage_image] =>[orig_patent_app_number] => 11362633 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/362633
Low-power random bit generator using thermal noise and method thereof Feb 26, 2006 Issued
Array ( [id] => 918346 [patent_doc_number] => 07328227 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-05 [patent_title] => 'Low power vector summation apparatus' [patent_app_type] => utility [patent_app_number] => 11/359201 [patent_app_country] => US [patent_app_date] => 2006-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3377 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/328/07328227.pdf [firstpage_image] =>[orig_patent_app_number] => 11359201 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/359201
Low power vector summation apparatus Feb 21, 2006 Issued
Array ( [id] => 126450 [patent_doc_number] => 07711765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-04 [patent_title] => 'Method and apparatus to perform multiply-and-accumulate operations' [patent_app_type] => utility [patent_app_number] => 11/357816 [patent_app_country] => US [patent_app_date] => 2006-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 6927 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/711/07711765.pdf [firstpage_image] =>[orig_patent_app_number] => 11357816 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/357816
Method and apparatus to perform multiply-and-accumulate operations Feb 16, 2006 Issued
Array ( [id] => 5071296 [patent_doc_number] => 20070192398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-16 [patent_title] => 'Booth multiplier with enhanced reduction tree circuitry' [patent_app_type] => utility [patent_app_number] => 11/355397 [patent_app_country] => US [patent_app_date] => 2006-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6577 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20070192398.pdf [firstpage_image] =>[orig_patent_app_number] => 11355397 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/355397
Booth multiplier with enhanced reduction tree circuitry Feb 14, 2006 Issued
Array ( [id] => 5071297 [patent_doc_number] => 20070192399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-16 [patent_title] => 'Power-efficient sign extension for booth multiplication methods and systems' [patent_app_type] => utility [patent_app_number] => 11/356359 [patent_app_country] => US [patent_app_date] => 2006-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6880 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20070192399.pdf [firstpage_image] =>[orig_patent_app_number] => 11356359 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/356359
Power-efficient sign extension for booth multiplication methods and systems Feb 14, 2006 Issued
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