Search

Tan V. Mai

Examiner (ID: 15743)

Most Active Art Unit
2193
Art Unit(s)
2306, 2193, 2787, 2786, 2121, 2124, 2302, 2301, 2182, 2183
Total Applications
3863
Issued Applications
3431
Pending Applications
94
Abandoned Applications
349

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5809135 [patent_doc_number] => 20060095490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-04 [patent_title] => 'Method for representing complex numbers in a communication system' [patent_app_type] => utility [patent_app_number] => 10/978778 [patent_app_country] => US [patent_app_date] => 2004-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 16484 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20060095490.pdf [firstpage_image] =>[orig_patent_app_number] => 10978778 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/978778
Method for representing complex numbers in a communication system Oct 31, 2004 Issued
Array ( [id] => 350493 [patent_doc_number] => 07496618 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-24 [patent_title] => 'System and method for a fast fourier transform architecture in a multicarrier transceiver' [patent_app_type] => utility [patent_app_number] => 10/978344 [patent_app_country] => US [patent_app_date] => 2004-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 15544 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/496/07496618.pdf [firstpage_image] =>[orig_patent_app_number] => 10978344 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/978344
System and method for a fast fourier transform architecture in a multicarrier transceiver Oct 31, 2004 Issued
Array ( [id] => 597746 [patent_doc_number] => 07447719 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-04 [patent_title] => 'Quantum computing method and quantum computer' [patent_app_type] => utility [patent_app_number] => 10/975445 [patent_app_country] => US [patent_app_date] => 2004-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 8022 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/447/07447719.pdf [firstpage_image] =>[orig_patent_app_number] => 10975445 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/975445
Quantum computing method and quantum computer Oct 28, 2004 Issued
Array ( [id] => 7076105 [patent_doc_number] => 20050149300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-07 [patent_title] => 'Method and apparatus for enhanced estimation of an analyte property through multiple region transformation' [patent_app_type] => utility [patent_app_number] => 10/976530 [patent_app_country] => US [patent_app_date] => 2004-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7685 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20050149300.pdf [firstpage_image] =>[orig_patent_app_number] => 10976530 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/976530
Method and apparatus for enhanced estimation of an analyte property through multiple region transformation Oct 28, 2004 Issued
Array ( [id] => 6917190 [patent_doc_number] => 20050094751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-05 [patent_title] => 'Variable gain integrator' [patent_app_type] => utility [patent_app_number] => 10/978109 [patent_app_country] => US [patent_app_date] => 2004-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4573 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20050094751.pdf [firstpage_image] =>[orig_patent_app_number] => 10978109 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/978109
Variable gain integrator Oct 28, 2004 Issued
Array ( [id] => 5809139 [patent_doc_number] => 20060095494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-04 [patent_title] => 'Method and apparatus for efficient software-based integer division' [patent_app_type] => utility [patent_app_number] => 10/975319 [patent_app_country] => US [patent_app_date] => 2004-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5160 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20060095494.pdf [firstpage_image] =>[orig_patent_app_number] => 10975319 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/975319
Method and apparatus for efficient software-based integer division Oct 27, 2004 Abandoned
Array ( [id] => 355266 [patent_doc_number] => 07493356 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-17 [patent_title] => 'Device and method for cryptoprocessor' [patent_app_type] => utility [patent_app_number] => 10/976249 [patent_app_country] => US [patent_app_date] => 2004-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3092 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/493/07493356.pdf [firstpage_image] =>[orig_patent_app_number] => 10976249 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/976249
Device and method for cryptoprocessor Oct 27, 2004 Issued
Array ( [id] => 5809132 [patent_doc_number] => 20060095487 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-04 [patent_title] => 'Binary representation of number based on processor word size' [patent_app_type] => utility [patent_app_number] => 10/974689 [patent_app_country] => US [patent_app_date] => 2004-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3300 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20060095487.pdf [firstpage_image] =>[orig_patent_app_number] => 10974689 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/974689
Binary representation of number based on processor word size Oct 27, 2004 Issued
Array ( [id] => 6999210 [patent_doc_number] => 20050138103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-23 [patent_title] => 'Novel adder structure with midcycle latch for power reduction' [patent_app_type] => utility [patent_app_number] => 10/973365 [patent_app_country] => US [patent_app_date] => 2004-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4373 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20050138103.pdf [firstpage_image] =>[orig_patent_app_number] => 10973365 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/973365
Adder structure with midcycle latch for power reduction Oct 25, 2004 Issued
Array ( [id] => 355267 [patent_doc_number] => 07493357 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-17 [patent_title] => 'Random carry-in for floating-point operations' [patent_app_type] => utility [patent_app_number] => 10/971851 [patent_app_country] => US [patent_app_date] => 2004-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 5708 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/493/07493357.pdf [firstpage_image] =>[orig_patent_app_number] => 10971851 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/971851
Random carry-in for floating-point operations Oct 21, 2004 Issued
Array ( [id] => 7261199 [patent_doc_number] => 20050144209 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Apparatus and method for selectively performing Fast Hadamard Transform or fast fourier transform' [patent_app_type] => utility [patent_app_number] => 10/969504 [patent_app_country] => US [patent_app_date] => 2004-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9000 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0144/20050144209.pdf [firstpage_image] =>[orig_patent_app_number] => 10969504 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/969504
Apparatus and method for selectively performing Fast Hadamard Transform or Fast Fourier Transform Oct 18, 2004 Issued
Array ( [id] => 6940862 [patent_doc_number] => 20050114425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-26 [patent_title] => 'Configurable calculating unit' [patent_app_type] => utility [patent_app_number] => 10/963426 [patent_app_country] => US [patent_app_date] => 2004-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6431 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20050114425.pdf [firstpage_image] =>[orig_patent_app_number] => 10963426 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/963426
Configurable calculating unit Oct 10, 2004 Issued
Array ( [id] => 5108501 [patent_doc_number] => 20070067379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'Data processing apparatus' [patent_app_type] => utility [patent_app_number] => 10/575861 [patent_app_country] => US [patent_app_date] => 2004-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 2792 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20070067379.pdf [firstpage_image] =>[orig_patent_app_number] => 10575861 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/575861
Data processing apparatus Oct 5, 2004 Abandoned
Array ( [id] => 6919596 [patent_doc_number] => 20050097157 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-05 [patent_title] => 'Calculating unit and method for adding' [patent_app_type] => utility [patent_app_number] => 10/959907 [patent_app_country] => US [patent_app_date] => 2004-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5528 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20050097157.pdf [firstpage_image] =>[orig_patent_app_number] => 10959907 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/959907
Calculating unit and method for adding Oct 5, 2004 Issued
Array ( [id] => 6919595 [patent_doc_number] => 20050097156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-05 [patent_title] => 'Calculating unit and method for subtracting' [patent_app_type] => utility [patent_app_number] => 10/957536 [patent_app_country] => US [patent_app_date] => 2004-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7077 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20050097156.pdf [firstpage_image] =>[orig_patent_app_number] => 10957536 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/957536
Calculating unit and method for subtracting Sep 30, 2004 Issued
Array ( [id] => 805941 [patent_doc_number] => 07424507 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-09-09 [patent_title] => 'High speed, low power, pipelined zero crossing detector that utilizes carry save adders' [patent_app_type] => utility [patent_app_number] => 10/955697 [patent_app_country] => US [patent_app_date] => 2004-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 6917 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/424/07424507.pdf [firstpage_image] =>[orig_patent_app_number] => 10955697 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/955697
High speed, low power, pipelined zero crossing detector that utilizes carry save adders Sep 29, 2004 Issued
Array ( [id] => 294030 [patent_doc_number] => 07546330 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-09 [patent_title] => 'Systems for performing multiply-accumulate operations on operands representing complex numbers' [patent_app_type] => utility [patent_app_number] => 10/953421 [patent_app_country] => US [patent_app_date] => 2004-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9011 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/546/07546330.pdf [firstpage_image] =>[orig_patent_app_number] => 10953421 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/953421
Systems for performing multiply-accumulate operations on operands representing complex numbers Sep 29, 2004 Issued
Array ( [id] => 5638733 [patent_doc_number] => 20060069707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-30 [patent_title] => 'System and method for introducing dither for reducing spurs in digital-to-time converter direct digital synthesis' [patent_app_type] => utility [patent_app_number] => 10/954571 [patent_app_country] => US [patent_app_date] => 2004-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6658 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0069/20060069707.pdf [firstpage_image] =>[orig_patent_app_number] => 10954571 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/954571
System and method for introducing dither for reducing spurs in digital-to-time converter direct digital synthesis Sep 29, 2004 Issued
Array ( [id] => 7128689 [patent_doc_number] => 20050060358 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-17 [patent_title] => 'Device for determining the rank of a sample, an apparatus for determining the rank of a plurality of samples, and the iTH rank ordered filter' [patent_app_type] => utility [patent_app_number] => 10/954553 [patent_app_country] => US [patent_app_date] => 2004-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5551 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20050060358.pdf [firstpage_image] =>[orig_patent_app_number] => 10954553 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/954553
Device for determining the rank of a sample, an apparatus for determining the rank of a plurality of samples, and the ith rank ordered filter Sep 29, 2004 Issued
Array ( [id] => 294029 [patent_doc_number] => 07546329 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-09 [patent_title] => 'Systems for performing multiplication operations on operands representing complex numbers' [patent_app_type] => utility [patent_app_number] => 10/951867 [patent_app_country] => US [patent_app_date] => 2004-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9088 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/546/07546329.pdf [firstpage_image] =>[orig_patent_app_number] => 10951867 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/951867
Systems for performing multiplication operations on operands representing complex numbers Sep 28, 2004 Issued
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