
Tan V. Mai
Examiner (ID: 15743)
| Most Active Art Unit | 2193 |
| Art Unit(s) | 2306, 2193, 2787, 2786, 2121, 2124, 2302, 2301, 2182, 2183 |
| Total Applications | 3863 |
| Issued Applications | 3431 |
| Pending Applications | 94 |
| Abandoned Applications | 349 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6999210
[patent_doc_number] => 20050138103
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-23
[patent_title] => 'Novel adder structure with midcycle latch for power reduction'
[patent_app_type] => utility
[patent_app_number] => 10/973365
[patent_app_country] => US
[patent_app_date] => 2004-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 4373
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0138/20050138103.pdf
[firstpage_image] =>[orig_patent_app_number] => 10973365
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/973365 | Adder structure with midcycle latch for power reduction | Oct 25, 2004 | Issued |
Array
(
[id] => 355267
[patent_doc_number] => 07493357
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-02-17
[patent_title] => 'Random carry-in for floating-point operations'
[patent_app_type] => utility
[patent_app_number] => 10/971851
[patent_app_country] => US
[patent_app_date] => 2004-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 5708
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/493/07493357.pdf
[firstpage_image] =>[orig_patent_app_number] => 10971851
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/971851 | Random carry-in for floating-point operations | Oct 21, 2004 | Issued |
Array
(
[id] => 7261199
[patent_doc_number] => 20050144209
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-30
[patent_title] => 'Apparatus and method for selectively performing Fast Hadamard Transform or fast fourier transform'
[patent_app_type] => utility
[patent_app_number] => 10/969504
[patent_app_country] => US
[patent_app_date] => 2004-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 9000
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0144/20050144209.pdf
[firstpage_image] =>[orig_patent_app_number] => 10969504
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/969504 | Apparatus and method for selectively performing Fast Hadamard Transform or Fast Fourier Transform | Oct 18, 2004 | Issued |
Array
(
[id] => 6940862
[patent_doc_number] => 20050114425
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-26
[patent_title] => 'Configurable calculating unit'
[patent_app_type] => utility
[patent_app_number] => 10/963426
[patent_app_country] => US
[patent_app_date] => 2004-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6431
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0114/20050114425.pdf
[firstpage_image] =>[orig_patent_app_number] => 10963426
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/963426 | Configurable calculating unit | Oct 10, 2004 | Issued |
Array
(
[id] => 5108501
[patent_doc_number] => 20070067379
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-22
[patent_title] => 'Data processing apparatus'
[patent_app_type] => utility
[patent_app_number] => 10/575861
[patent_app_country] => US
[patent_app_date] => 2004-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 2792
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0067/20070067379.pdf
[firstpage_image] =>[orig_patent_app_number] => 10575861
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/575861 | Data processing apparatus | Oct 5, 2004 | Abandoned |
Array
(
[id] => 6919596
[patent_doc_number] => 20050097157
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-05
[patent_title] => 'Calculating unit and method for adding'
[patent_app_type] => utility
[patent_app_number] => 10/959907
[patent_app_country] => US
[patent_app_date] => 2004-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 5528
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0097/20050097157.pdf
[firstpage_image] =>[orig_patent_app_number] => 10959907
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/959907 | Calculating unit and method for adding | Oct 5, 2004 | Issued |
Array
(
[id] => 6919595
[patent_doc_number] => 20050097156
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-05-05
[patent_title] => 'Calculating unit and method for subtracting'
[patent_app_type] => utility
[patent_app_number] => 10/957536
[patent_app_country] => US
[patent_app_date] => 2004-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 7077
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0097/20050097156.pdf
[firstpage_image] =>[orig_patent_app_number] => 10957536
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/957536 | Calculating unit and method for subtracting | Sep 30, 2004 | Issued |
Array
(
[id] => 294030
[patent_doc_number] => 07546330
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-06-09
[patent_title] => 'Systems for performing multiply-accumulate operations on operands representing complex numbers'
[patent_app_type] => utility
[patent_app_number] => 10/953421
[patent_app_country] => US
[patent_app_date] => 2004-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 9011
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 253
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/546/07546330.pdf
[firstpage_image] =>[orig_patent_app_number] => 10953421
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/953421 | Systems for performing multiply-accumulate operations on operands representing complex numbers | Sep 29, 2004 | Issued |
Array
(
[id] => 5638733
[patent_doc_number] => 20060069707
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-30
[patent_title] => 'System and method for introducing dither for reducing spurs in digital-to-time converter direct digital synthesis'
[patent_app_type] => utility
[patent_app_number] => 10/954571
[patent_app_country] => US
[patent_app_date] => 2004-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6658
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0069/20060069707.pdf
[firstpage_image] =>[orig_patent_app_number] => 10954571
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/954571 | System and method for introducing dither for reducing spurs in digital-to-time converter direct digital synthesis | Sep 29, 2004 | Issued |
Array
(
[id] => 805941
[patent_doc_number] => 07424507
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-09-09
[patent_title] => 'High speed, low power, pipelined zero crossing detector that utilizes carry save adders'
[patent_app_type] => utility
[patent_app_number] => 10/955697
[patent_app_country] => US
[patent_app_date] => 2004-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 14
[patent_no_of_words] => 6917
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/424/07424507.pdf
[firstpage_image] =>[orig_patent_app_number] => 10955697
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/955697 | High speed, low power, pipelined zero crossing detector that utilizes carry save adders | Sep 29, 2004 | Issued |
Array
(
[id] => 7128689
[patent_doc_number] => 20050060358
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-17
[patent_title] => 'Device for determining the rank of a sample, an apparatus for determining the rank of a plurality of samples, and the iTH rank ordered filter'
[patent_app_type] => utility
[patent_app_number] => 10/954553
[patent_app_country] => US
[patent_app_date] => 2004-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5551
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0060/20050060358.pdf
[firstpage_image] =>[orig_patent_app_number] => 10954553
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/954553 | Device for determining the rank of a sample, an apparatus for determining the rank of a plurality of samples, and the ith rank ordered filter | Sep 29, 2004 | Issued |
Array
(
[id] => 294029
[patent_doc_number] => 07546329
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-06-09
[patent_title] => 'Systems for performing multiplication operations on operands representing complex numbers'
[patent_app_type] => utility
[patent_app_number] => 10/951867
[patent_app_country] => US
[patent_app_date] => 2004-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 9088
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/546/07546329.pdf
[firstpage_image] =>[orig_patent_app_number] => 10951867
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/951867 | Systems for performing multiplication operations on operands representing complex numbers | Sep 28, 2004 | Issued |
Array
(
[id] => 5639019
[patent_doc_number] => 20060069993
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-30
[patent_title] => 'Method and system for multithread processing of spreadsheet chain calculations'
[patent_app_type] => utility
[patent_app_number] => 10/951576
[patent_app_country] => US
[patent_app_date] => 2004-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 9728
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0069/20060069993.pdf
[firstpage_image] =>[orig_patent_app_number] => 10951576
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/951576 | Method and system for multithread processing of spreadsheet chain calculations | Sep 26, 2004 | Issued |
Array
(
[id] => 801371
[patent_doc_number] => 07426527
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-09-16
[patent_title] => 'Random number generator and method for generating a random number'
[patent_app_type] => utility
[patent_app_number] => 10/948627
[patent_app_country] => US
[patent_app_date] => 2004-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 7266
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/426/07426527.pdf
[firstpage_image] =>[orig_patent_app_number] => 10948627
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/948627 | Random number generator and method for generating a random number | Sep 22, 2004 | Issued |
Array
(
[id] => 5830446
[patent_doc_number] => 20060064450
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-23
[patent_title] => 'Base four processor'
[patent_app_type] => utility
[patent_app_number] => 10/945483
[patent_app_country] => US
[patent_app_date] => 2004-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 17092
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0064/20060064450.pdf
[firstpage_image] =>[orig_patent_app_number] => 10945483
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/945483 | Base four processor | Sep 19, 2004 | Issued |
Array
(
[id] => 538377
[patent_doc_number] => 07188135
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-03-06
[patent_title] => 'Analog adaptive FIR filter having independent coefficient sets for each filter tap'
[patent_app_type] => utility
[patent_app_number] => 10/944470
[patent_app_country] => US
[patent_app_date] => 2004-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 3961
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/188/07188135.pdf
[firstpage_image] =>[orig_patent_app_number] => 10944470
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/944470 | Analog adaptive FIR filter having independent coefficient sets for each filter tap | Sep 15, 2004 | Issued |
Array
(
[id] => 5906271
[patent_doc_number] => 20060047739
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-02
[patent_title] => 'Decimal floating-point adder'
[patent_app_type] => utility
[patent_app_number] => 10/941645
[patent_app_country] => US
[patent_app_date] => 2004-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8364
[patent_no_of_claims] => 59
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0047/20060047739.pdf
[firstpage_image] =>[orig_patent_app_number] => 10941645
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/941645 | Decimal floating-point adder | Sep 14, 2004 | Issued |
Array
(
[id] => 832302
[patent_doc_number] => 07401110
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-07-15
[patent_title] => 'System, method and apparatus for an improved MD5 hash algorithm'
[patent_app_type] => utility
[patent_app_number] => 10/938462
[patent_app_country] => US
[patent_app_date] => 2004-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 7331
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/401/07401110.pdf
[firstpage_image] =>[orig_patent_app_number] => 10938462
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/938462 | System, method and apparatus for an improved MD5 hash algorithm | Sep 8, 2004 | Issued |
Array
(
[id] => 5052607
[patent_doc_number] => 20070033152
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-08
[patent_title] => 'Digital signal processing device'
[patent_app_type] => utility
[patent_app_number] => 10/571021
[patent_app_country] => US
[patent_app_date] => 2004-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7984
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0033/20070033152.pdf
[firstpage_image] =>[orig_patent_app_number] => 10571021
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/571021 | Digital signal processing device | Sep 6, 2004 | Abandoned |
Array
(
[id] => 7159472
[patent_doc_number] => 20050027777
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-03
[patent_title] => 'High speed low power 4-2 compressor'
[patent_app_type] => utility
[patent_app_number] => 10/932593
[patent_app_country] => US
[patent_app_date] => 2004-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6657
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0027/20050027777.pdf
[firstpage_image] =>[orig_patent_app_number] => 10932593
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/932593 | High speed low power 4-2 compressor | Sep 1, 2004 | Abandoned |