Tan V. Mai

Array ( [id] => 5639019 [patent_doc_number] => 20060069993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-30 [patent_title] => 'Method and system for multithread processing of spreadsheet chain calculations' [patent_app_type] => utility [patent_app_number] => 10/951576 [patent_app_country] => US [patent_app_date] => 2004-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9728 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0069/20060069993.pdf [firstpage_image] =>[orig_patent_app_number] => 10951576 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 801371 [patent_doc_number] => 07426527 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-09-16 [patent_title] => 'Random number generator and method for generating a random number' [patent_app_type] => utility [patent_app_number] => 10/948627 [patent_app_country] => US [patent_app_date] => 2004-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7266 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/426/07426527.pdf [firstpage_image] =>[orig_patent_app_number] => 10948627 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5830446 [patent_doc_number] => 20060064450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-23 [patent_title] => 'Base four processor' [patent_app_type] => utility [patent_app_number] => 10/945483 [patent_app_country] => US [patent_app_date] => 2004-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 17092 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20060064450.pdf [firstpage_image] =>[orig_patent_app_number] => 10945483 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 538377 [patent_doc_number] => 07188135 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-06 [patent_title] => 'Analog adaptive FIR filter having independent coefficient sets for each filter tap' [patent_app_type] => utility [patent_app_number] => 10/944470 [patent_app_country] => US [patent_app_date] => 2004-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3961 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/188/07188135.pdf [firstpage_image] =>[orig_patent_app_number] => 10944470 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5906271 [patent_doc_number] => 20060047739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Decimal floating-point adder' [patent_app_type] => utility [patent_app_number] => 10/941645 [patent_app_country] => US [patent_app_date] => 2004-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8364 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20060047739.pdf [firstpage_image] =>[orig_patent_app_number] => 10941645 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 832302 [patent_doc_number] => 07401110 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-07-15 [patent_title] => 'System, method and apparatus for an improved MD5 hash algorithm' [patent_app_type] => utility [patent_app_number] => 10/938462 [patent_app_country] => US [patent_app_date] => 2004-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7331 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/401/07401110.pdf [firstpage_image] =>[orig_patent_app_number] => 10938462 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5052607 [patent_doc_number] => 20070033152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Digital signal processing device' [patent_app_type] => utility [patent_app_number] => 10/571021 [patent_app_country] => US [patent_app_date] => 2004-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7984 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20070033152.pdf [firstpage_image] =>[orig_patent_app_number] => 10571021 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7159472 [patent_doc_number] => 20050027777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'High speed low power 4-2 compressor' [patent_app_type] => utility [patent_app_number] => 10/932593 [patent_app_country] => US [patent_app_date] => 2004-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6657 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20050027777.pdf [firstpage_image] =>[orig_patent_app_number] => 10932593 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6985101 [patent_doc_number] => 20050154773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-14 [patent_title] => 'Data processing apparatus and method for performing data processing operations on floating point data elements' [patent_app_type] => utility [patent_app_number] => 10/930846 [patent_app_country] => US [patent_app_date] => 2004-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5751 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20050154773.pdf [firstpage_image] =>[orig_patent_app_number] => 10930846 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5906261 [patent_doc_number] => 20060047736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Arithmetic circuitry for averaging and methods thereof' [patent_app_type] => utility [patent_app_number] => 10/930760 [patent_app_country] => US [patent_app_date] => 2004-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3230 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20060047736.pdf [firstpage_image] =>[orig_patent_app_number] => 10930760 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 700886 [patent_doc_number] => 07072924 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-07-04 [patent_title] => 'Method and apparatus for generating random numbers for use in a field programmable gate array' [patent_app_type] => utility [patent_app_number] => 10/711115 [patent_app_country] => US [patent_app_date] => 2004-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5524 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/072/07072924.pdf [firstpage_image] =>[orig_patent_app_number] => 10711115 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7118603 [patent_doc_number] => 20050071400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-31 [patent_title] => 'Method and apparatus for generating true random numbers by way of a quantum optics process' [patent_app_type] => utility [patent_app_number] => 10/919573 [patent_app_country] => US [patent_app_date] => 2004-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3099 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20050071400.pdf [firstpage_image] =>[orig_patent_app_number] => 10919573 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5803075 [patent_doc_number] => 20060036664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-16 [patent_title] => 'Efficient FIR filter suitable for use with high order modulation radio frequency transmitters' [patent_app_type] => utility [patent_app_number] => 10/917784 [patent_app_country] => US [patent_app_date] => 2004-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5598 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20060036664.pdf [firstpage_image] =>[orig_patent_app_number] => 10917784 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 362215 [patent_doc_number] => 07487196 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-02-03 [patent_title] => 'Methods and apparatus for implementing a saturating multiplier' [patent_app_type] => utility [patent_app_number] => 10/918117 [patent_app_country] => US [patent_app_date] => 2004-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 6221 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/487/07487196.pdf [firstpage_image] =>[orig_patent_app_number] => 10918117 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5882197 [patent_doc_number] => 20060031280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Carry-skip adder having merged carry-skip cells with sum cells' [patent_app_type] => utility [patent_app_number] => 10/911824 [patent_app_country] => US [patent_app_date] => 2004-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5073 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20060031280.pdf [firstpage_image] =>[orig_patent_app_number] => 10911824 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5821911 [patent_doc_number] => 20060026224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'Method and circuit for combined multiplication and division' [patent_app_type] => utility [patent_app_number] => 10/909154 [patent_app_country] => US [patent_app_date] => 2004-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3400 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20060026224.pdf [firstpage_image] =>[orig_patent_app_number] => 10909154 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 600061 [patent_doc_number] => 07437398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-14 [patent_title] => 'Pattern matching architecture' [patent_app_type] => utility [patent_app_number] => 10/903501 [patent_app_country] => US [patent_app_date] => 2004-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5285 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/437/07437398.pdf [firstpage_image] =>[orig_patent_app_number] => 10903501 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5882193 [patent_doc_number] => 20060031276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Signal-processing apparatus and method' [patent_app_type] => utility [patent_app_number] => 10/901108 [patent_app_country] => US [patent_app_date] => 2004-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 10766 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20060031276.pdf [firstpage_image] =>[orig_patent_app_number] => 10901108 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 863804 [patent_doc_number] => 07373370 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-13 [patent_title] => 'Extendable squarer and operation method for processing digital signals' [patent_app_type] => utility [patent_app_number] => 10/899734 [patent_app_country] => US [patent_app_date] => 2004-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3059 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/373/07373370.pdf [firstpage_image] =>[orig_patent_app_number] => 10899734 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7603702 [patent_doc_number] => 07117236 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-03 [patent_title] => 'Parallel adder-based DCT/IDCT design using cyclic convolution' [patent_app_type] => utility [patent_app_number] => 10/897486 [patent_app_country] => US [patent_app_date] => 2004-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7365 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/117/07117236.pdf [firstpage_image] =>[orig_patent_app_number] => 10897486 [rel_patent_id] =>[rel_patent_doc_number] =>)