Tan V. Mai

Array ( [id] => 7320945 [patent_doc_number] => 20040225703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Floating point overflow and sign detection' [patent_app_type] => new [patent_app_number] => 10/867126 [patent_app_country] => US [patent_app_date] => 2004-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6238 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20040225703.pdf [firstpage_image] =>[orig_patent_app_number] => 10867126 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 600045 [patent_doc_number] => 07437391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-14 [patent_title] => 'Numerically controlled oscillator and method of operation' [patent_app_type] => utility [patent_app_number] => 10/867025 [patent_app_country] => US [patent_app_date] => 2004-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2073 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/437/07437391.pdf [firstpage_image] =>[orig_patent_app_number] => 10867025 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7254767 [patent_doc_number] => 20050273482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-08 [patent_title] => 'Digital filter and method thereof using frequency translations' [patent_app_type] => utility [patent_app_number] => 10/861867 [patent_app_country] => US [patent_app_date] => 2004-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12368 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20050273482.pdf [firstpage_image] =>[orig_patent_app_number] => 10861867 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6999201 [patent_doc_number] => 20050138097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-23 [patent_title] => 'One-dimensional fourier transform program, method and apparatus' [patent_app_type] => utility [patent_app_number] => 10/861561 [patent_app_country] => US [patent_app_date] => 2004-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9122 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20050138097.pdf [firstpage_image] =>[orig_patent_app_number] => 10861561 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 336462 [patent_doc_number] => 07509367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-24 [patent_title] => 'Method and apparatus for performing multiply-add operations on packed data' [patent_app_type] => utility [patent_app_number] => 10/861167 [patent_app_country] => US [patent_app_date] => 2004-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 8499 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/509/07509367.pdf [firstpage_image] =>[orig_patent_app_number] => 10861167 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 873024 [patent_doc_number] => 07366745 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-04-29 [patent_title] => 'High-speed function approximation' [patent_app_type] => utility [patent_app_number] => 10/861184 [patent_app_country] => US [patent_app_date] => 2004-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3874 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/366/07366745.pdf [firstpage_image] =>[orig_patent_app_number] => 10861184 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7087733 [patent_doc_number] => 20050007845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'HIS data compression' [patent_app_type] => utility [patent_app_number] => 10/858965 [patent_app_country] => US [patent_app_date] => 2004-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6560 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20050007845.pdf [firstpage_image] =>[orig_patent_app_number] => 10858965 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 839633 [patent_doc_number] => 07395289 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-01 [patent_title] => 'Frequency synthesizing and back-end processing circuit and method thereof' [patent_app_type] => utility [patent_app_number] => 10/709824 [patent_app_country] => US [patent_app_date] => 2004-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1573 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/395/07395289.pdf [firstpage_image] =>[orig_patent_app_number] => 10709824 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6953748 [patent_doc_number] => 20050228843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'Method and apparatus for demodulating square root' [patent_app_type] => utility [patent_app_number] => 10/857047 [patent_app_country] => US [patent_app_date] => 2004-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3714 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20050228843.pdf [firstpage_image] =>[orig_patent_app_number] => 10857047 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 600062 [patent_doc_number] => 07437399 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-14 [patent_title] => 'Method and apparatus for averaging parity protected binary numbers' [patent_app_type] => utility [patent_app_number] => 10/855528 [patent_app_country] => US [patent_app_date] => 2004-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 5574 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/437/07437399.pdf [firstpage_image] =>[orig_patent_app_number] => 10855528 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 829017 [patent_doc_number] => 07403962 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-22 [patent_title] => 'Interpolation filter design and application' [patent_app_type] => utility [patent_app_number] => 10/856024 [patent_app_country] => US [patent_app_date] => 2004-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 6047 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/403/07403962.pdf [firstpage_image] =>[orig_patent_app_number] => 10856024 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5773761 [patent_doc_number] => 20050267925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-01 [patent_title] => 'Methods and apparatus for transforming amplitude-frequency signal characteristics and interpolating analytical functions using circulant matrices' [patent_app_type] => utility [patent_app_number] => 10/856453 [patent_app_country] => US [patent_app_date] => 2004-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 7732 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20050267925.pdf [firstpage_image] =>[orig_patent_app_number] => 10856453 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5773768 [patent_doc_number] => 20050267926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-01 [patent_title] => 'Finite field serial-serial multiplication/reduction structure and method' [patent_app_type] => utility [patent_app_number] => 10/854295 [patent_app_country] => US [patent_app_date] => 2004-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 12236 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20050267926.pdf [firstpage_image] =>[orig_patent_app_number] => 10854295 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 340028 [patent_doc_number] => 07506017 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-03-17 [patent_title] => 'Verifiable multimode multipliers' [patent_app_type] => utility [patent_app_number] => 10/853427 [patent_app_country] => US [patent_app_date] => 2004-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 8595 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/506/07506017.pdf [firstpage_image] =>[orig_patent_app_number] => 10853427 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7595910 [patent_doc_number] => 07620672 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-17 [patent_title] => 'Method for performing classical Bayesian net calculations using a quantum computer' [patent_app_type] => utility [patent_app_number] => 10/852328 [patent_app_country] => US [patent_app_date] => 2004-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10724 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/620/07620672.pdf [firstpage_image] =>[orig_patent_app_number] => 10852328 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7231866 [patent_doc_number] => 20050262176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-24 [patent_title] => 'Polyphase filter with optimized silicon area' [patent_app_type] => utility [patent_app_number] => 10/852282 [patent_app_country] => US [patent_app_date] => 2004-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3179 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20050262176.pdf [firstpage_image] =>[orig_patent_app_number] => 10852282 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 860109 [patent_doc_number] => 07376691 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-20 [patent_title] => 'Arithmetic and logic unit using half adder' [patent_app_type] => utility [patent_app_number] => 10/849665 [patent_app_country] => US [patent_app_date] => 2004-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2314 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/376/07376691.pdf [firstpage_image] =>[orig_patent_app_number] => 10849665 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7299796 [patent_doc_number] => 20040215680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-28 [patent_title] => 'Min and max operations for multiplication and/or division under the simple interval system' [patent_app_type] => new [patent_app_number] => 10/850078 [patent_app_country] => US [patent_app_date] => 2004-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5151 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20040215680.pdf [firstpage_image] =>[orig_patent_app_number] => 10850078 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6973584 [patent_doc_number] => 20050038846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Substraction circuit with a dummy digital to analog converter' [patent_app_type] => utility [patent_app_number] => 10/847433 [patent_app_country] => US [patent_app_date] => 2004-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5584 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20050038846.pdf [firstpage_image] =>[orig_patent_app_number] => 10847433 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 362211 [patent_doc_number] => 07487193 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-03 [patent_title] => 'Fast video codec transform implementations' [patent_app_type] => utility [patent_app_number] => 10/845808 [patent_app_country] => US [patent_app_date] => 2004-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6948 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/487/07487193.pdf [firstpage_image] =>[orig_patent_app_number] => 10845808 [rel_patent_id] =>[rel_patent_doc_number] =>)