Search

Tan V. Mai

Examiner (ID: 15743)

Most Active Art Unit
2193
Art Unit(s)
2306, 2193, 2787, 2786, 2121, 2124, 2302, 2301, 2182, 2183
Total Applications
3863
Issued Applications
3431
Pending Applications
94
Abandoned Applications
349

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7259369 [patent_doc_number] => 20050076074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-07 [patent_title] => 'Adder, multiplier and integrated circuit' [patent_app_type] => utility [patent_app_number] => 10/648373 [patent_app_country] => US [patent_app_date] => 2003-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7667 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20050076074.pdf [firstpage_image] =>[orig_patent_app_number] => 10648373 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/648373
Adder, multiplier and integrated circuit Aug 26, 2003 Issued
Array ( [id] => 523543 [patent_doc_number] => 07197528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-27 [patent_title] => 'Jacobian group element adder' [patent_app_type] => utility [patent_app_number] => 10/643972 [patent_app_country] => US [patent_app_date] => 2003-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 32269 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/197/07197528.pdf [firstpage_image] =>[orig_patent_app_number] => 10643972 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/643972
Jacobian group element adder Aug 19, 2003 Issued
Array ( [id] => 7245882 [patent_doc_number] => 20040158596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'Data processing apparatus' [patent_app_type] => new [patent_app_number] => 10/643875 [patent_app_country] => US [patent_app_date] => 2003-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4471 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20040158596.pdf [firstpage_image] =>[orig_patent_app_number] => 10643875 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/643875
Data processing apparatus Aug 19, 2003 Issued
Array ( [id] => 6973554 [patent_doc_number] => 20050038839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Method and system for evaluating a set of normalizing features and for iteratively refining a set of normalizing features' [patent_app_type] => utility [patent_app_number] => 10/639184 [patent_app_country] => US [patent_app_date] => 2003-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9731 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20050038839.pdf [firstpage_image] =>[orig_patent_app_number] => 10639184 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/639184
Method and system for evaluating a set of normalizing features and for iteratively refining a set of normalizing features Aug 10, 2003 Abandoned
Array ( [id] => 7035809 [patent_doc_number] => 20050033784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-10 [patent_title] => 'Input and evaluation of fractions using a calculator' [patent_app_type] => utility [patent_app_number] => 10/636785 [patent_app_country] => US [patent_app_date] => 2003-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4376 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20050033784.pdf [firstpage_image] =>[orig_patent_app_number] => 10636785 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/636785
Input and evaluation of fractions using a calculator Aug 7, 2003 Issued
Array ( [id] => 633119 [patent_doc_number] => 07133887 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-07 [patent_title] => 'Detection and identification of stable PRI patterns using multiple parallel hypothesis correlation algorithms' [patent_app_type] => utility [patent_app_number] => 10/637386 [patent_app_country] => US [patent_app_date] => 2003-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 11992 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/133/07133887.pdf [firstpage_image] =>[orig_patent_app_number] => 10637386 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/637386
Detection and identification of stable PRI patterns using multiple parallel hypothesis correlation algorithms Aug 7, 2003 Issued
Array ( [id] => 7393053 [patent_doc_number] => 20040030734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'Secure hardware random number generator' [patent_app_type] => new [patent_app_number] => 10/638097 [patent_app_country] => US [patent_app_date] => 2003-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7584 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20040030734.pdf [firstpage_image] =>[orig_patent_app_number] => 10638097 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/638097
Secure hardware random number generator Aug 6, 2003 Issued
Array ( [id] => 557788 [patent_doc_number] => 07177888 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-13 [patent_title] => 'Programmable random bit source' [patent_app_type] => utility [patent_app_number] => 10/633096 [patent_app_country] => US [patent_app_date] => 2003-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 4992 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/177/07177888.pdf [firstpage_image] =>[orig_patent_app_number] => 10633096 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/633096
Programmable random bit source Jul 31, 2003 Issued
Array ( [id] => 7373277 [patent_doc_number] => 20040093365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-13 [patent_title] => 'Interpolation method, apparatus for carrying out the method, and control program for implementing the method' [patent_app_type] => new [patent_app_number] => 10/632136 [patent_app_country] => US [patent_app_date] => 2003-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 14630 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20040093365.pdf [firstpage_image] =>[orig_patent_app_number] => 10632136 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/632136
Interpolation method, apparatus for carrying out the method, and control program for implementing the method Jul 30, 2003 Issued
Array ( [id] => 7159462 [patent_doc_number] => 20050027774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Saturated arithmetic in a processing unit' [patent_app_type] => utility [patent_app_number] => 10/631196 [patent_app_country] => US [patent_app_date] => 2003-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2063 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20050027774.pdf [firstpage_image] =>[orig_patent_app_number] => 10631196 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/631196
Saturated arithmetic in a processing unit Jul 30, 2003 Issued
Array ( [id] => 7159434 [patent_doc_number] => 20050027764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Polynomial time deterministic method for testing primality of numbers' [patent_app_type] => utility [patent_app_number] => 10/631346 [patent_app_country] => US [patent_app_date] => 2003-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5238 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20050027764.pdf [firstpage_image] =>[orig_patent_app_number] => 10631346 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/631346
Polynomial time deterministic method for testing primality of numbers Jul 30, 2003 Issued
Array ( [id] => 757301 [patent_doc_number] => 07024444 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-04-04 [patent_title] => 'Split multiplier array and method of operation' [patent_app_type] => utility [patent_app_number] => 10/623711 [patent_app_country] => US [patent_app_date] => 2003-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6404 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/024/07024444.pdf [firstpage_image] =>[orig_patent_app_number] => 10623711 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/623711
Split multiplier array and method of operation Jul 20, 2003 Issued
Array ( [id] => 6968127 [patent_doc_number] => 20050235024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-20 [patent_title] => 'Virtually parallel multiplier-accumulator' [patent_app_type] => utility [patent_app_number] => 10/622764 [patent_app_country] => US [patent_app_date] => 2003-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5603 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20050235024.pdf [firstpage_image] =>[orig_patent_app_number] => 10622764 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/622764
Virtually parallel multiplier-accumulator Jul 16, 2003 Issued
Array ( [id] => 7367593 [patent_doc_number] => 20040015676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-22 [patent_title] => 'Sharing of a logic operator having a work register' [patent_app_type] => new [patent_app_number] => 10/619105 [patent_app_country] => US [patent_app_date] => 2003-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2076 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20040015676.pdf [firstpage_image] =>[orig_patent_app_number] => 10619105 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/619105
Sharing of a logic operator having a work register Jul 13, 2003 Abandoned
Array ( [id] => 7123590 [patent_doc_number] => 20050015419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-20 [patent_title] => 'Techniques to provide programmable finite impulse response filtering' [patent_app_type] => utility [patent_app_number] => 10/619771 [patent_app_country] => US [patent_app_date] => 2003-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1360 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20050015419.pdf [firstpage_image] =>[orig_patent_app_number] => 10619771 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/619771
Techniques to provide programmable finite impulse response filtering Jul 13, 2003 Abandoned
Array ( [id] => 7091583 [patent_doc_number] => 20050010631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Decimal multiplication using digit recoding' [patent_app_type] => utility [patent_app_number] => 10/616556 [patent_app_country] => US [patent_app_date] => 2003-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4891 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20050010631.pdf [firstpage_image] =>[orig_patent_app_number] => 10616556 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/616556
Decimal multiplication using digit recoding Jul 9, 2003 Issued
Array ( [id] => 7091566 [patent_doc_number] => 20050010622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'Method and apparatus for binary number conversion' [patent_app_type] => utility [patent_app_number] => 10/616646 [patent_app_country] => US [patent_app_date] => 2003-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4475 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20050010622.pdf [firstpage_image] =>[orig_patent_app_number] => 10616646 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/616646
Method and apparatus for binary number conversion Jul 9, 2003 Issued
Array ( [id] => 517459 [patent_doc_number] => 07203715 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-10 [patent_title] => 'Method and relative quantum gate for running a Grover\'s or a Deutsch-Jozsa\'s quantum algorithm' [patent_app_type] => utility [patent_app_number] => 10/615446 [patent_app_country] => US [patent_app_date] => 2003-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5222 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/203/07203715.pdf [firstpage_image] =>[orig_patent_app_number] => 10615446 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/615446
Method and relative quantum gate for running a Grover's or a Deutsch-Jozsa's quantum algorithm Jul 7, 2003 Issued
Array ( [id] => 434739 [patent_doc_number] => 07266579 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-04 [patent_title] => 'Combined polynomial and natural multiplier architecture' [patent_app_type] => utility [patent_app_number] => 10/615476 [patent_app_country] => US [patent_app_date] => 2003-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 6531 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/266/07266579.pdf [firstpage_image] =>[orig_patent_app_number] => 10615476 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/615476
Combined polynomial and natural multiplier architecture Jul 6, 2003 Issued
Array ( [id] => 7471326 [patent_doc_number] => 20040199562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-07 [patent_title] => 'Efficient multiplication sequence for large integer operands wider than the multiplier hardware' [patent_app_type] => new [patent_app_number] => 10/615475 [patent_app_country] => US [patent_app_date] => 2003-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4099 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20040199562.pdf [firstpage_image] =>[orig_patent_app_number] => 10615475 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/615475
Efficient multiplication sequence for large integer operands wider than the multiplier hardware Jul 6, 2003 Issued
Menu