Search

Tan V. Mai

Examiner (ID: 15743)

Most Active Art Unit
2193
Art Unit(s)
2306, 2193, 2787, 2786, 2121, 2124, 2302, 2301, 2182, 2183
Total Applications
3863
Issued Applications
3431
Pending Applications
94
Abandoned Applications
349

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 684362 [patent_doc_number] => 07085798 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-01 [patent_title] => 'Sense-amp based adder with source follower pass gate evaluation tree' [patent_app_type] => utility [patent_app_number] => 10/167276 [patent_app_country] => US [patent_app_date] => 2002-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 2957 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/085/07085798.pdf [firstpage_image] =>[orig_patent_app_number] => 10167276 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/167276
Sense-amp based adder with source follower pass gate evaluation tree Jun 9, 2002 Issued
Array ( [id] => 6423003 [patent_doc_number] => 20020184284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Single precision array processor' [patent_app_type] => new [patent_app_number] => 10/167004 [patent_app_country] => US [patent_app_date] => 2002-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12304 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20020184284.pdf [firstpage_image] =>[orig_patent_app_number] => 10167004 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/167004
Single precision array processor Jun 9, 2002 Issued
Array ( [id] => 6679517 [patent_doc_number] => 20030229658 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-11 [patent_title] => 'Method of pattern lossless compression' [patent_app_type] => new [patent_app_number] => 10/162677 [patent_app_country] => US [patent_app_date] => 2002-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1894 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0229/20030229658.pdf [firstpage_image] =>[orig_patent_app_number] => 10162677 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/162677
Method of pattern lossless compression Jun 5, 2002 Abandoned
Array ( [id] => 6717226 [patent_doc_number] => 20030028574 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Method and hardware for computing reciprocal square root and program for the same' [patent_app_type] => new [patent_app_number] => 10/160966 [patent_app_country] => US [patent_app_date] => 2002-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7098 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20030028574.pdf [firstpage_image] =>[orig_patent_app_number] => 10160966 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/160966
Method and hardware for computing reciprocal square root and program for the same May 30, 2002 Issued
Array ( [id] => 6702924 [patent_doc_number] => 20030225804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-04 [patent_title] => 'Average code generation circuit' [patent_app_type] => new [patent_app_number] => 10/158695 [patent_app_country] => US [patent_app_date] => 2002-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4451 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20030225804.pdf [firstpage_image] =>[orig_patent_app_number] => 10158695 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/158695
Average code generation circuit May 29, 2002 Issued
10/069637 Filter unit comprising a core filter, a decimator and an interpolator May 27, 2002 Abandoned
Array ( [id] => 6460437 [patent_doc_number] => 20020150417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-17 [patent_title] => 'Multifunction electronic bookmark' [patent_app_type] => new [patent_app_number] => 10/154283 [patent_app_country] => US [patent_app_date] => 2002-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2108 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20020150417.pdf [firstpage_image] =>[orig_patent_app_number] => 10154283 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/154283
Multifunction electronic bookmark May 22, 2002 Abandoned
Array ( [id] => 6693652 [patent_doc_number] => 20030041084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-27 [patent_title] => 'Statement regarding federally sponsered research or development' [patent_app_type] => new [patent_app_number] => 10/154200 [patent_app_country] => US [patent_app_date] => 2002-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 10119 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20030041084.pdf [firstpage_image] =>[orig_patent_app_number] => 10154200 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/154200
Spatio-temporal filter and method May 20, 2002 Issued
Array ( [id] => 7071021 [patent_doc_number] => 20050246406 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2005-11-03 [patent_title] => 'Emod a fast modulus calculation for computer systems' [patent_app_type] => utility [patent_app_number] => 10/140885 [patent_app_country] => US [patent_app_date] => 2002-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5924 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A9/0246/20050246406.pdf [firstpage_image] =>[orig_patent_app_number] => 10140885 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/140885
Emod a fast modulus calculation for computer systems May 8, 2002 Issued
Array ( [id] => 6646447 [patent_doc_number] => 20030212720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-13 [patent_title] => 'Method/apparatus for conversion of higher order bits of 64-bit integer to floating point using 53-bit adder hardware' [patent_app_type] => new [patent_app_number] => 10/142237 [patent_app_country] => US [patent_app_date] => 2002-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3163 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20030212720.pdf [firstpage_image] =>[orig_patent_app_number] => 10142237 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/142237
Method/apparatus for conversion of higher order bits of 64-bit integer to floating point using 53-bit adder hardware May 8, 2002 Issued
Array ( [id] => 7071021 [patent_doc_number] => 20050246406 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2005-11-03 [patent_title] => 'Emod a fast modulus calculation for computer systems' [patent_app_type] => utility [patent_app_number] => 10/140885 [patent_app_country] => US [patent_app_date] => 2002-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5924 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A9/0246/20050246406.pdf [firstpage_image] =>[orig_patent_app_number] => 10140885 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/140885
Emod a fast modulus calculation for computer systems May 8, 2002 Issued
Array ( [id] => 989350 [patent_doc_number] => 06922714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-26 [patent_title] => 'Floating point unit power reduction scheme' [patent_app_type] => utility [patent_app_number] => 10/143366 [patent_app_country] => US [patent_app_date] => 2002-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4297 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/922/06922714.pdf [firstpage_image] =>[orig_patent_app_number] => 10143366 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/143366
Floating point unit power reduction scheme May 8, 2002 Issued
Array ( [id] => 7371848 [patent_doc_number] => 20040006580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-08 [patent_title] => 'Random bit stream generation by amplification of thermal noise in a CMOS process' [patent_app_type] => new [patent_app_number] => 10/140766 [patent_app_country] => US [patent_app_date] => 2002-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4720 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20040006580.pdf [firstpage_image] =>[orig_patent_app_number] => 10140766 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/140766
Random bit stream generation by amplification of thermal noise in a CMOS process May 7, 2002 Issued
Array ( [id] => 752586 [patent_doc_number] => 07028060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-11 [patent_title] => 'Method and apparatus for jointly optimizing linear signal processing filters with subband filters' [patent_app_type] => utility [patent_app_number] => 10/141507 [patent_app_country] => US [patent_app_date] => 2002-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 7799 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/028/07028060.pdf [firstpage_image] =>[orig_patent_app_number] => 10141507 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/141507
Method and apparatus for jointly optimizing linear signal processing filters with subband filters May 6, 2002 Issued
Array ( [id] => 937236 [patent_doc_number] => 06976042 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-13 [patent_title] => 'Low cost white noise generator' [patent_app_type] => utility [patent_app_number] => 10/138688 [patent_app_country] => US [patent_app_date] => 2002-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1571 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/976/06976042.pdf [firstpage_image] =>[orig_patent_app_number] => 10138688 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/138688
Low cost white noise generator May 2, 2002 Issued
Array ( [id] => 6725367 [patent_doc_number] => 20030207679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-06 [patent_title] => 'Integrated low power channel select filter having high dynamic range and bandwidth' [patent_app_type] => new [patent_app_number] => 10/138848 [patent_app_country] => US [patent_app_date] => 2002-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5628 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20030207679.pdf [firstpage_image] =>[orig_patent_app_number] => 10138848 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/138848
Integrated low power channel select filter having high dynamic range and bandwidth May 2, 2002 Issued
Array ( [id] => 6665217 [patent_doc_number] => 20030204544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'Time-recursive lattice structure for IFFT in DMT application' [patent_app_type] => new [patent_app_number] => 10/135677 [patent_app_country] => US [patent_app_date] => 2002-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5569 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20030204544.pdf [firstpage_image] =>[orig_patent_app_number] => 10135677 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/135677
Time-recursive lattice structure for IFFT in DMT application Apr 29, 2002 Issued
Array ( [id] => 407036 [patent_doc_number] => 07290021 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-30 [patent_title] => 'Method and apparatus for parallel signal processing' [patent_app_type] => utility [patent_app_number] => 10/132085 [patent_app_country] => US [patent_app_date] => 2002-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 3734 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/290/07290021.pdf [firstpage_image] =>[orig_patent_app_number] => 10132085 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/132085
Method and apparatus for parallel signal processing Apr 23, 2002 Issued
Array ( [id] => 350495 [patent_doc_number] => 07496620 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-24 [patent_title] => 'Calculation apparatus' [patent_app_type] => utility [patent_app_number] => 10/475945 [patent_app_country] => US [patent_app_date] => 2002-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 5427 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/496/07496620.pdf [firstpage_image] =>[orig_patent_app_number] => 10475945 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/475945
Calculation apparatus Apr 22, 2002 Issued
Array ( [id] => 6810300 [patent_doc_number] => 20030200239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-23 [patent_title] => 'Gap histogram on-line randomness test' [patent_app_type] => new [patent_app_number] => 10/127556 [patent_app_country] => US [patent_app_date] => 2002-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3004 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20030200239.pdf [firstpage_image] =>[orig_patent_app_number] => 10127556 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/127556
Gap histogram on-line randomness test Apr 21, 2002 Issued
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