Search

Tanh Q. Nguyen

Examiner (ID: 1959, Phone: (571)272-4154 , Office: P/2118 )

Most Active Art Unit
2182
Art Unit(s)
2182, 2187, 2782, 2116, 2118
Total Applications
709
Issued Applications
458
Pending Applications
29
Abandoned Applications
223

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17061672 [patent_doc_number] => 11106270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Parallel/serial operational sequencing [patent_app_type] => utility [patent_app_number] => 16/462725 [patent_app_country] => US [patent_app_date] => 2017-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7001 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16462725 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/462725
Parallel/serial operational sequencing Jan 30, 2017 Issued
Array ( [id] => 15472593 [patent_doc_number] => 10552171 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Efficient booting system [patent_app_type] => utility [patent_app_number] => 15/352619 [patent_app_country] => US [patent_app_date] => 2016-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5656 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15352619 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/352619
Efficient booting system Nov 15, 2016 Issued
Array ( [id] => 15486255 [patent_doc_number] => 10558477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-11 [patent_title] => Array clocking in emulation [patent_app_type] => utility [patent_app_number] => 15/352824 [patent_app_country] => US [patent_app_date] => 2016-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3504 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15352824 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/352824
Array clocking in emulation Nov 15, 2016 Issued
Array ( [id] => 12734626 [patent_doc_number] => 20180136709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => Dynamic External Power Resource Selection [patent_app_type] => utility [patent_app_number] => 15/353548 [patent_app_country] => US [patent_app_date] => 2016-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13952 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15353548 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/353548
Dynamic External Power Resource Selection Nov 15, 2016 Abandoned
Array ( [id] => 11708552 [patent_doc_number] => 20170177050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-22 [patent_title] => 'ELECTRONIC SYSTEM, TERMINAL DEVICE, AND FUNCTION EXPANSION DEVICE' [patent_app_type] => utility [patent_app_number] => 15/352205 [patent_app_country] => US [patent_app_date] => 2016-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10719 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15352205 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/352205
Electronic system, terminal device, and function expansion device Nov 14, 2016 Issued
Array ( [id] => 11965513 [patent_doc_number] => 20170269667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => 'ELECTRONIC DEVICE AND ENERGY SAVING METHOD' [patent_app_type] => utility [patent_app_number] => 15/233226 [patent_app_country] => US [patent_app_date] => 2016-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6062 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15233226 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/233226
ELECTRONIC DEVICE AND ENERGY SAVING METHOD Aug 9, 2016 Abandoned
Array ( [id] => 11458681 [patent_doc_number] => 20170052587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-23 [patent_title] => 'APPARATUS, AUTHENTICATION PROCESS METHOD, AND COMPUTER PROGRAM PRODUCT' [patent_app_type] => utility [patent_app_number] => 15/233546 [patent_app_country] => US [patent_app_date] => 2016-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 15843 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15233546 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/233546
Apparatus, authentication process method, and computer program product Aug 9, 2016 Issued
Array ( [id] => 12187307 [patent_doc_number] => 20180046243 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-15 [patent_title] => 'MODIFICATION OF WHEN WORKLOADS ACCESS DATA UNITS AND/OR ON WHICH STORAGE DEVICES DATA UNITS ARE STORED TO CONSERVE POWER' [patent_app_type] => utility [patent_app_number] => 15/232103 [patent_app_country] => US [patent_app_date] => 2016-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5508 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15232103 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/232103
Modification of when workloads access data units and/or on which storage devices data units are stored to conserve power Aug 8, 2016 Issued
Array ( [id] => 13708701 [patent_doc_number] => 20170365305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-21 [patent_title] => SELF-OPTIMIZED POWER MANAGEMENT FOR DDR-COMPATIBLE MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 15/231629 [patent_app_country] => US [patent_app_date] => 2016-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5480 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15231629 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/231629
Self-optimized power management for DDR-compatible memory systems Aug 7, 2016 Issued
Array ( [id] => 11995980 [patent_doc_number] => 20170300136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-19 [patent_title] => 'INPUT MODULE' [patent_app_type] => utility [patent_app_number] => 15/202454 [patent_app_country] => US [patent_app_date] => 2016-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2734 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15202454 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/202454
Input module Jul 4, 2016 Issued
Array ( [id] => 13347393 [patent_doc_number] => 20180225236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-09 [patent_title] => MEMORY CONTROLLER, STORAGE DEVICE, INFORMATION PROCESSING SYSTEM, AND MEMORY CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 15/750287 [patent_app_country] => US [patent_app_date] => 2016-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11534 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15750287 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/750287
Memory controller, storage device, information processing system, and memory control method Jun 30, 2016 Issued
Array ( [id] => 11049366 [patent_doc_number] => 20160246325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'Methods and Systems for Clocking a Physical Layer Interface' [patent_app_type] => utility [patent_app_number] => 15/145735 [patent_app_country] => US [patent_app_date] => 2016-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5311 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15145735 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/145735
Methods and systems for clocking a physical layer interface May 2, 2016 Issued
Array ( [id] => 11868298 [patent_doc_number] => 20170235583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'TRANSFER OF CONTROL OF CONFIGURATION SOURCES' [patent_app_type] => utility [patent_app_number] => 15/046367 [patent_app_country] => US [patent_app_date] => 2016-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6792 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15046367 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/046367
Transfer of control of configuration sources Feb 16, 2016 Issued
Array ( [id] => 11868070 [patent_doc_number] => 20170235355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'LAPTOP COMPONENT POWER CONSUMPTION SETTINGS RESPONSIVE TO MULTIPLE LID ANGLES' [patent_app_type] => utility [patent_app_number] => 15/046080 [patent_app_country] => US [patent_app_date] => 2016-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4545 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15046080 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/046080
LAPTOP COMPONENT POWER CONSUMPTION SETTINGS RESPONSIVE TO MULTIPLE LID ANGLES Feb 16, 2016 Abandoned
Array ( [id] => 13173343 [patent_doc_number] => 10102791 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-16 [patent_title] => Level shifter and projector [patent_app_type] => utility [patent_app_number] => 15/046208 [patent_app_country] => US [patent_app_date] => 2016-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3941 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15046208 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/046208
Level shifter and projector Feb 16, 2016 Issued
Array ( [id] => 11868643 [patent_doc_number] => 20170235928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'LICENSE MANAGEMENT IN PRE-BOOT ENVIRONMENTS' [patent_app_type] => utility [patent_app_number] => 15/045383 [patent_app_country] => US [patent_app_date] => 2016-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7617 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15045383 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/045383
License management in pre-boot environments Feb 16, 2016 Issued
Array ( [id] => 14855965 [patent_doc_number] => 10416704 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => Method and structure for determining global clock among systems [patent_app_type] => utility [patent_app_number] => 15/523942 [patent_app_country] => US [patent_app_date] => 2015-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 9190 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 553 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15523942 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/523942
Method and structure for determining global clock among systems Oct 28, 2015 Issued
Array ( [id] => 16501657 [patent_doc_number] => 10867045 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Runtime verification using external device [patent_app_type] => utility [patent_app_number] => 15/752304 [patent_app_country] => US [patent_app_date] => 2015-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3884 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15752304 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/752304
Runtime verification using external device Sep 29, 2015 Issued
Array ( [id] => 11086368 [patent_doc_number] => 20160283334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'UTILIZING A PROCESSOR WITH A TIME OF DAY CLOCK ERROR' [patent_app_type] => utility [patent_app_number] => 14/867049 [patent_app_country] => US [patent_app_date] => 2015-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4773 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14867049 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/867049
UTILIZING A PROCESSOR WITH A TIME OF DAY CLOCK ERROR Sep 27, 2015 Abandoned
Array ( [id] => 11245086 [patent_doc_number] => 09471126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-18 [patent_title] => 'Power management for PCIE switches and devices in a multi-root input-output virtualization blade chassis' [patent_app_type] => utility [patent_app_number] => 14/861832 [patent_app_country] => US [patent_app_date] => 2015-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11949 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14861832 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/861832
Power management for PCIE switches and devices in a multi-root input-output virtualization blade chassis Sep 21, 2015 Issued
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