Tanh Q. Nguyen

Array ( [id] => 4270765 [patent_doc_number] => 06223292 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Authorization systems, methods, and computer program products' [patent_app_type] => 1 [patent_app_number] => 8/893293 [patent_app_country] => US [patent_app_date] => 1997-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 4612 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/223/06223292.pdf [firstpage_image] =>[orig_patent_app_number] => 893293 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4057578 [patent_doc_number] => 05996061 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Method for invalidating data identified by software compiler' [patent_app_type] => 1 [patent_app_number] => 8/881044 [patent_app_country] => US [patent_app_date] => 1997-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7454 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/996/05996061.pdf [firstpage_image] =>[orig_patent_app_number] => 881044 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4166862 [patent_doc_number] => 06065072 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Device for selectively passing video frames from a signal series having a first frame rate to obtain a signal series having a second frame rate' [patent_app_type] => 1 [patent_app_number] => 8/865578 [patent_app_country] => US [patent_app_date] => 1997-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2646 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/065/06065072.pdf [firstpage_image] =>[orig_patent_app_number] => 865578 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4178597 [patent_doc_number] => 06115757 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'DMA control apparatus for multi-byte serial-bit transfer in a predetermined byte pattern and between memories associated with different asynchronously operating processors for a distributed system' [patent_app_type] => 1 [patent_app_number] => 8/833005 [patent_app_country] => US [patent_app_date] => 1997-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 35 [patent_no_of_words] => 11732 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/115/06115757.pdf [firstpage_image] =>[orig_patent_app_number] => 833005 [rel_patent_id] =>[rel_patent_doc_number] =>)