Search

Tanya Theresa Ngo Motsinger

Examiner (ID: 10491, Phone: (571)270-7488 , Office: P/2637 )

Most Active Art Unit
2637
Art Unit(s)
2635, 2613, 2637
Total Applications
469
Issued Applications
358
Pending Applications
25
Abandoned Applications
99

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10597532 [patent_doc_number] => 09318629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-19 [patent_title] => 'Method for fabricating sensor using multiple patterning processes' [patent_app_type] => utility [patent_app_number] => 14/125444 [patent_app_country] => US [patent_app_date] => 2012-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 18 [patent_no_of_words] => 4582 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14125444 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/125444
Method for fabricating sensor using multiple patterning processes Nov 22, 2012 Issued
Array ( [id] => 9459594 [patent_doc_number] => 20140124019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-08 [patent_title] => 'LOW VACUUM FABRICATION OF MICROCRYSTALLINE SOLAR CELLS' [patent_app_type] => utility [patent_app_number] => 13/677977 [patent_app_country] => US [patent_app_date] => 2012-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6206 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13677977 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/677977
LOW VACUUM FABRICATION OF MICROCRYSTALLINE SOLAR CELLS Nov 14, 2012 Abandoned
Array ( [id] => 9460522 [patent_doc_number] => 20140124948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-08 [patent_title] => 'Wafer-to-Wafer Process for Manufacturing a Stacked Structure' [patent_app_type] => utility [patent_app_number] => 13/674623 [patent_app_country] => US [patent_app_date] => 2012-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4135 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13674623 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/674623
Wafer-to-Wafer Process for Manufacturing a Stacked Structure Nov 11, 2012 Abandoned
Array ( [id] => 8812041 [patent_doc_number] => 20130113086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'SELF-LEVELING PLANARIZATION MATERIALS FOR MICROELECTRONIC TOPOGRAPHY' [patent_app_type] => utility [patent_app_number] => 13/672527 [patent_app_country] => US [patent_app_date] => 2012-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9963 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13672527 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/672527
Self-leveling planarization materials for microelectronic topography Nov 7, 2012 Issued
Array ( [id] => 9212929 [patent_doc_number] => 20140012106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-09 [patent_title] => 'STRETCHABLE CIRCUIT CONFIGURATION' [patent_app_type] => utility [patent_app_number] => 13/672362 [patent_app_country] => US [patent_app_date] => 2012-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5627 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13672362 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/672362
Stretchable electronic circuit Nov 7, 2012 Issued
Array ( [id] => 9463478 [patent_doc_number] => 20140127905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-08 [patent_title] => 'METHOD OF FORMING PATTERN IN SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/670477 [patent_app_country] => US [patent_app_date] => 2012-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2314 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13670477 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/670477
Method of forming pattern in substrate Nov 6, 2012 Issued
Array ( [id] => 9463425 [patent_doc_number] => 20140127852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-08 [patent_title] => 'LOW VACUUM FABRICATION OF MICROCRYSTALLINE SOLAR CELLS' [patent_app_type] => utility [patent_app_number] => 13/671104 [patent_app_country] => US [patent_app_date] => 2012-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6176 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13671104 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/671104
LOW VACUUM FABRICATION OF MICROCRYSTALLINE SOLAR CELLS Nov 6, 2012 Abandoned
Array ( [id] => 8955835 [patent_doc_number] => 08501607 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-06 [patent_title] => 'FinFET alignment structures using a double trench flow' [patent_app_type] => utility [patent_app_number] => 13/670880 [patent_app_country] => US [patent_app_date] => 2012-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 33 [patent_no_of_words] => 3866 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13670880 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/670880
FinFET alignment structures using a double trench flow Nov 6, 2012 Issued
Array ( [id] => 8994856 [patent_doc_number] => 08518741 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-27 [patent_title] => 'Wafer-to-wafer process for manufacturing a stacked structure' [patent_app_type] => utility [patent_app_number] => 13/671098 [patent_app_country] => US [patent_app_date] => 2012-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4095 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13671098 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/671098
Wafer-to-wafer process for manufacturing a stacked structure Nov 6, 2012 Issued
Array ( [id] => 8866147 [patent_doc_number] => 20130149850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-13 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/670119 [patent_app_country] => US [patent_app_date] => 2012-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4586 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13670119 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/670119
Method for manufacturing semiconductor device including Schottky electrode Nov 5, 2012 Issued
Array ( [id] => 8846115 [patent_doc_number] => 08455294 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Method of fabricating an image sensor structure' [patent_app_type] => utility [patent_app_number] => 13/653417 [patent_app_country] => US [patent_app_date] => 2012-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 3514 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13653417 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/653417
Method of fabricating an image sensor structure Oct 16, 2012 Issued
Array ( [id] => 8647114 [patent_doc_number] => 20130032844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-07 [patent_title] => 'LIGHT EMITTING PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/651110 [patent_app_country] => US [patent_app_date] => 2012-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4625 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13651110 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/651110
Light emitting package Oct 11, 2012 Issued
Array ( [id] => 9167212 [patent_doc_number] => 08592895 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-26 [patent_title] => 'Field effect transistor with source, heavy body region and shielded gate' [patent_app_type] => utility [patent_app_number] => 13/633038 [patent_app_country] => US [patent_app_date] => 2012-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 42 [patent_no_of_words] => 9383 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13633038 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/633038
Field effect transistor with source, heavy body region and shielded gate Sep 30, 2012 Issued
Array ( [id] => 8606666 [patent_doc_number] => 20130011978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-10 [patent_title] => 'Methods of Forming Memory Arrays and Semiconductor Constructions' [patent_app_type] => utility [patent_app_number] => 13/612692 [patent_app_country] => US [patent_app_date] => 2012-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5774 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13612692 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/612692
Methods of forming memory arrays and semiconductor constructions Sep 11, 2012 Issued
Array ( [id] => 9273466 [patent_doc_number] => 08637397 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-28 [patent_title] => 'Method for manufacturing a through hole electrode substrate' [patent_app_type] => utility [patent_app_number] => 13/607011 [patent_app_country] => US [patent_app_date] => 2012-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 35 [patent_no_of_words] => 9121 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13607011 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/607011
Method for manufacturing a through hole electrode substrate Sep 6, 2012 Issued
Array ( [id] => 8808255 [patent_doc_number] => 08445908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-21 [patent_title] => 'Parallel scan paths with stimulus and header data circuitry' [patent_app_type] => utility [patent_app_number] => 13/595297 [patent_app_country] => US [patent_app_date] => 2012-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 31 [patent_no_of_words] => 9651 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13595297 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/595297
Parallel scan paths with stimulus and header data circuitry Aug 26, 2012 Issued
Array ( [id] => 8518760 [patent_doc_number] => 20120318168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'SILICON/GERMANIUM OXIDE PARTICLE INKS AND PROCESSES FOR FORMING SOLAR CELL COMPONENTS AND FOR FORMING OPTICAL COMPONENTS' [patent_app_type] => utility [patent_app_number] => 13/595234 [patent_app_country] => US [patent_app_date] => 2012-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 12840 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13595234 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/595234
Silicon/germanium oxide particle inks and processes for forming solar cell components and for forming optical components Aug 26, 2012 Issued
Array ( [id] => 8516321 [patent_doc_number] => 20120315729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-13 [patent_title] => 'METHOD OF MANUFACTURING TRANSPARENT TRANSISTOR WITH MULTI-LAYERED STRUCTURES' [patent_app_type] => utility [patent_app_number] => 13/590768 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3623 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590768 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/590768
Method of manufacturing transparent transistor with multi-layered structures Aug 20, 2012 Issued
Array ( [id] => 8592514 [patent_doc_number] => 08350391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-08 [patent_title] => 'Sheet structure, semiconductor device and method of growing carbon structure' [patent_app_type] => utility [patent_app_number] => 13/562782 [patent_app_country] => US [patent_app_date] => 2012-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 47 [patent_no_of_words] => 14773 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13562782 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/562782
Sheet structure, semiconductor device and method of growing carbon structure Jul 30, 2012 Issued
Array ( [id] => 9710692 [patent_doc_number] => 08835260 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-16 [patent_title] => 'Control of threshold voltages in high-k metal gate stack and structures for CMOS devices' [patent_app_type] => utility [patent_app_number] => 13/547792 [patent_app_country] => US [patent_app_date] => 2012-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3481 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13547792 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/547792
Control of threshold voltages in high-k metal gate stack and structures for CMOS devices Jul 11, 2012 Issued
Menu