Search

Tanya Theresa Ngo Motsinger

Examiner (ID: 10491, Phone: (571)270-7488 , Office: P/2637 )

Most Active Art Unit
2637
Art Unit(s)
2635, 2613, 2637
Total Applications
469
Issued Applications
358
Pending Applications
25
Abandoned Applications
99

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10502735 [patent_doc_number] => 09231138 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-05 [patent_title] => 'Method of producing barrier film exhibiting excellent gas barrier property, and barrier film' [patent_app_type] => utility [patent_app_number] => 13/392581 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15179 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13392581 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/392581
Method of producing barrier film exhibiting excellent gas barrier property, and barrier film Jul 13, 2010 Issued
Array ( [id] => 6416577 [patent_doc_number] => 20100276680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-04 [patent_title] => 'ORGANIC LIGHT EMITTING DISPLAY HAVING A GAS VENT GROOVE TO DEREASE EDGE OPEN FAILURES' [patent_app_type] => utility [patent_app_number] => 12/835082 [patent_app_country] => US [patent_app_date] => 2010-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3583 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20100276680.pdf [firstpage_image] =>[orig_patent_app_number] => 12835082 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/835082
Organic light emitting display (OLED) having a gas vent groove to decrease edge open failures Jul 12, 2010 Issued
Array ( [id] => 6624400 [patent_doc_number] => 20100311216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-09 [patent_title] => 'Method for Forming Active and Gate Runner Trenches' [patent_app_type] => utility [patent_app_number] => 12/830770 [patent_app_country] => US [patent_app_date] => 2010-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 11240 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0311/20100311216.pdf [firstpage_image] =>[orig_patent_app_number] => 12830770 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/830770
Method for forming active and gate runner trenches Jul 5, 2010 Issued
Array ( [id] => 7706556 [patent_doc_number] => 20120001259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'METHOD AND APPARATUS FOR IMPROVING GATE CONTACT' [patent_app_type] => utility [patent_app_number] => 12/830107 [patent_app_country] => US [patent_app_date] => 2010-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7160 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12830107 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/830107
Method and device with gate structure formed over the recessed top portion of the isolation structure Jul 1, 2010 Issued
Array ( [id] => 7711166 [patent_doc_number] => 20120003762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'Method to Protect Compound Semiconductor from Electrostatic Discharge Damage' [patent_app_type] => utility [patent_app_number] => 12/826829 [patent_app_country] => US [patent_app_date] => 2010-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2626 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12826829 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/826829
Method to Protect Compound Semiconductor from Electrostatic Discharge Damage Jun 29, 2010 Abandoned
Array ( [id] => 6348095 [patent_doc_number] => 20100330715 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'Uniform Transfer of Luminescent Quantum Dots onto a Substrate' [patent_app_type] => utility [patent_app_number] => 12/824949 [patent_app_country] => US [patent_app_date] => 2010-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7332 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0330/20100330715.pdf [firstpage_image] =>[orig_patent_app_number] => 12824949 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/824949
Uniform transfer of luminescent quantum dots onto a substrate Jun 27, 2010 Issued
Array ( [id] => 8151999 [patent_doc_number] => 08168486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-01 [patent_title] => 'Methods for manufacturing enhancement-mode HEMTs with self-aligned field plate' [patent_app_type] => utility [patent_app_number] => 12/823060 [patent_app_country] => US [patent_app_date] => 2010-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 41 [patent_no_of_words] => 5956 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/168/08168486.pdf [firstpage_image] =>[orig_patent_app_number] => 12823060 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/823060
Methods for manufacturing enhancement-mode HEMTs with self-aligned field plate Jun 23, 2010 Issued
Array ( [id] => 5959067 [patent_doc_number] => 20110183454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-28 [patent_title] => 'Method for preparing OLED by imprinting process' [patent_app_type] => utility [patent_app_number] => 12/801760 [patent_app_country] => US [patent_app_date] => 2010-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3118 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20110183454.pdf [firstpage_image] =>[orig_patent_app_number] => 12801760 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/801760
Method for preparing OLED by imprinting process Jun 23, 2010 Issued
Array ( [id] => 4492743 [patent_doc_number] => 07955920 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-07 [patent_title] => 'Field effect transistor with self-aligned source and heavy body regions and method of manufacturing same' [patent_app_type] => utility [patent_app_number] => 12/822008 [patent_app_country] => US [patent_app_date] => 2010-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 42 [patent_no_of_words] => 9340 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/955/07955920.pdf [firstpage_image] =>[orig_patent_app_number] => 12822008 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/822008
Field effect transistor with self-aligned source and heavy body regions and method of manufacturing same Jun 22, 2010 Issued
Array ( [id] => 6096557 [patent_doc_number] => 20110003433 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-06 [patent_title] => 'MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/819379 [patent_app_country] => US [patent_app_date] => 2010-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 7162 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20110003433.pdf [firstpage_image] =>[orig_patent_app_number] => 12819379 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/819379
Manufacturing method of preparing a substrate with forming and removing the check patterns in scribing regions before dicing to form semiconductor device Jun 20, 2010 Issued
Array ( [id] => 6265447 [patent_doc_number] => 20100253435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-07 [patent_title] => 'RF POWER AMPLIFIER CIRCUIT UTILIZING BONDWIRES IN IMPEDANCE MATCHING' [patent_app_type] => utility [patent_app_number] => 12/819018 [patent_app_country] => US [patent_app_date] => 2010-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4961 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20100253435.pdf [firstpage_image] =>[orig_patent_app_number] => 12819018 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/819018
RF POWER AMPLIFIER CIRCUIT UTILIZING BONDWIRES IN IMPEDANCE MATCHING Jun 17, 2010 Abandoned
Array ( [id] => 8527770 [patent_doc_number] => 08304340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-06 [patent_title] => 'Method for manufacturing stacked contact plugs' [patent_app_type] => utility [patent_app_number] => 12/818570 [patent_app_country] => US [patent_app_date] => 2010-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3849 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12818570 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/818570
Method for manufacturing stacked contact plugs Jun 17, 2010 Issued
Array ( [id] => 7656947 [patent_doc_number] => 20110306216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-15 [patent_title] => 'MASK HOLDING DEVICE' [patent_app_type] => utility [patent_app_number] => 12/817389 [patent_app_country] => US [patent_app_date] => 2010-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3301 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0306/20110306216.pdf [firstpage_image] =>[orig_patent_app_number] => 12817389 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/817389
MASK HOLDING DEVICE Jun 16, 2010 Abandoned
Array ( [id] => 6135354 [patent_doc_number] => 20110008947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-13 [patent_title] => 'APPARATUS AND METHOD FOR PERFORMING MULTIFUNCTION LASER PROCESSES' [patent_app_type] => utility [patent_app_number] => 12/817499 [patent_app_country] => US [patent_app_date] => 2010-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13816 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20110008947.pdf [firstpage_image] =>[orig_patent_app_number] => 12817499 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/817499
APPARATUS AND METHOD FOR PERFORMING MULTIFUNCTION LASER PROCESSES Jun 16, 2010 Abandoned
Array ( [id] => 7662883 [patent_doc_number] => 20110312152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-22 [patent_title] => 'Methods of Fabricating Integrated Circuit Devices Using Selective Etching Techniques that Account for Etching Distance Variations' [patent_app_type] => utility [patent_app_number] => 12/816649 [patent_app_country] => US [patent_app_date] => 2010-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5437 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0312/20110312152.pdf [firstpage_image] =>[orig_patent_app_number] => 12816649 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/816649
Methods of Fabricating Integrated Circuit Devices Using Selective Etching Techniques that Account for Etching Distance Variations Jun 15, 2010 Abandoned
Array ( [id] => 6348463 [patent_doc_number] => 20100330777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'METHOD FOR REPROCESSING SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING SOI SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 12/797650 [patent_app_country] => US [patent_app_date] => 2010-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 51 [patent_no_of_words] => 28861 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0330/20100330777.pdf [firstpage_image] =>[orig_patent_app_number] => 12797650 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/797650
Method for reprocessing semiconductor substrate by stepwise etching with at least two etching treatments Jun 9, 2010 Issued
Array ( [id] => 6609923 [patent_doc_number] => 20100323492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'Methods of manufacturing phase-change random access memory devices' [patent_app_type] => utility [patent_app_number] => 12/801450 [patent_app_country] => US [patent_app_date] => 2010-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6249 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0323/20100323492.pdf [firstpage_image] =>[orig_patent_app_number] => 12801450 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/801450
Methods of manufacturing phase-change random access memory devices with phase-change nanowire formation using single element Jun 8, 2010 Issued
Array ( [id] => 8317441 [patent_doc_number] => 08232216 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-31 [patent_title] => 'Semiconductor manufacturing apparatus and method for manufacturing a semiconductor' [patent_app_type] => utility [patent_app_number] => 12/801420 [patent_app_country] => US [patent_app_date] => 2010-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4140 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12801420 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/801420
Semiconductor manufacturing apparatus and method for manufacturing a semiconductor Jun 7, 2010 Issued
Array ( [id] => 6096584 [patent_doc_number] => 20110003443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-06 [patent_title] => 'METHOD FOR PRODUCING A TRANSISTOR WITH METALLIC SOURCE AND DRAIN' [patent_app_type] => utility [patent_app_number] => 12/796282 [patent_app_country] => US [patent_app_date] => 2010-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7145 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20110003443.pdf [firstpage_image] =>[orig_patent_app_number] => 12796282 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/796282
Method for producing a transistor with metallic source and drain Jun 7, 2010 Issued
Array ( [id] => 8760023 [patent_doc_number] => 08420544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-16 [patent_title] => 'Method for fabricating interconnection structure with dry-cleaning process' [patent_app_type] => utility [patent_app_number] => 12/792840 [patent_app_country] => US [patent_app_date] => 2010-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3681 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12792840 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/792840
Method for fabricating interconnection structure with dry-cleaning process Jun 2, 2010 Issued
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