Search

Tanya Theresa Ngo Motsinger

Examiner (ID: 10491, Phone: (571)270-7488 , Office: P/2637 )

Most Active Art Unit
2637
Art Unit(s)
2635, 2613, 2637
Total Applications
469
Issued Applications
358
Pending Applications
25
Abandoned Applications
99

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 103854 [patent_doc_number] => 07723845 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-25 [patent_title] => 'System and method of a heat transfer system with an evaporator and a condenser' [patent_app_type] => utility [patent_app_number] => 11/932911 [patent_app_country] => US [patent_app_date] => 2007-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 32 [patent_no_of_words] => 9367 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/723/07723845.pdf [firstpage_image] =>[orig_patent_app_number] => 11932911 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/932911
System and method of a heat transfer system with an evaporator and a condenser Oct 30, 2007 Issued
Array ( [id] => 557445 [patent_doc_number] => 07470582 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-30 [patent_title] => 'Method of manufacturing semiconductor device having impurity region under isolation region' [patent_app_type] => utility [patent_app_number] => 11/907857 [patent_app_country] => US [patent_app_date] => 2007-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 38 [patent_no_of_words] => 13403 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/470/07470582.pdf [firstpage_image] =>[orig_patent_app_number] => 11907857 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/907857
Method of manufacturing semiconductor device having impurity region under isolation region Oct 17, 2007 Issued
Array ( [id] => 4768758 [patent_doc_number] => 20080054414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-06 [patent_title] => 'Method of manufacturing semiconductor device having impurity region under isolation region' [patent_app_type] => utility [patent_app_number] => 11/907864 [patent_app_country] => US [patent_app_date] => 2007-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 13370 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20080054414.pdf [firstpage_image] =>[orig_patent_app_number] => 11907864 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/907864
Method of manufacturing semiconductor device having impurity region under isolation region Oct 17, 2007 Issued
Array ( [id] => 4912424 [patent_doc_number] => 20080093023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-24 [patent_title] => 'Semiconductor processing apparatus and method for using same' [patent_app_type] => utility [patent_app_number] => 11/907820 [patent_app_country] => US [patent_app_date] => 2007-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9485 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20080093023.pdf [firstpage_image] =>[orig_patent_app_number] => 11907820 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/907820
Semiconductor processing apparatus and method for using same Oct 16, 2007 Issued
Array ( [id] => 4552760 [patent_doc_number] => 07960770 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-14 [patent_title] => 'Nonvolatile memory element array with storing layer formed by resistance variable layers' [patent_app_type] => utility [patent_app_number] => 12/445380 [patent_app_country] => US [patent_app_date] => 2007-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 13982 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/960/07960770.pdf [firstpage_image] =>[orig_patent_app_number] => 12445380 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/445380
Nonvolatile memory element array with storing layer formed by resistance variable layers Oct 11, 2007 Issued
Array ( [id] => 4784375 [patent_doc_number] => 20080137704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-12 [patent_title] => 'Tuneable unipolar lasers' [patent_app_type] => utility [patent_app_number] => 11/974238 [patent_app_country] => US [patent_app_date] => 2007-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5172 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0137/20080137704.pdf [firstpage_image] =>[orig_patent_app_number] => 11974238 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/974238
Tuneable unipolar lasers Oct 11, 2007 Issued
Array ( [id] => 5427211 [patent_doc_number] => 20090086521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-02 [patent_title] => 'MULTIPLE ANTIFUSE MEMORY CELLS AND METHODS TO FORM, PROGRAM, AND SENSE THE SAME' [patent_app_type] => utility [patent_app_number] => 11/864870 [patent_app_country] => US [patent_app_date] => 2007-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10936 [patent_no_of_claims] => 115 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20090086521.pdf [firstpage_image] =>[orig_patent_app_number] => 11864870 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/864870
MULTIPLE ANTIFUSE MEMORY CELLS AND METHODS TO FORM, PROGRAM, AND SENSE THE SAME Sep 27, 2007 Abandoned
Array ( [id] => 4543429 [patent_doc_number] => 07875987 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-25 [patent_title] => 'Method and apparatus for measurement and control of photomask to substrate alignment' [patent_app_type] => utility [patent_app_number] => 11/861380 [patent_app_country] => US [patent_app_date] => 2007-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 6506 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 13 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/875/07875987.pdf [firstpage_image] =>[orig_patent_app_number] => 11861380 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/861380
Method and apparatus for measurement and control of photomask to substrate alignment Sep 25, 2007 Issued
Array ( [id] => 4919178 [patent_doc_number] => 20080067490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-20 [patent_title] => 'Phase-change memory device having heater electrode with improved heat generation efficiency' [patent_app_type] => utility [patent_app_number] => 11/902008 [patent_app_country] => US [patent_app_date] => 2007-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8387 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20080067490.pdf [firstpage_image] =>[orig_patent_app_number] => 11902008 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/902008
Phase-change memory device having heater electrode with improved heat generation efficiency Sep 17, 2007 Abandoned
Array ( [id] => 4901709 [patent_doc_number] => 20080111121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-15 [patent_title] => 'PHASE CHANGE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/855952 [patent_app_country] => US [patent_app_date] => 2007-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5025 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20080111121.pdf [firstpage_image] =>[orig_patent_app_number] => 11855952 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/855952
Phase change memory device and method of fabricating the same Sep 13, 2007 Issued
Array ( [id] => 4896830 [patent_doc_number] => 20080116443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-22 [patent_title] => 'PHASE CHANGE MEMORY DEVICE WITH HOLE FOR A LOWER ELECTRODE DEFINED IN A STABLE MANNER AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/854898 [patent_app_country] => US [patent_app_date] => 2007-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3590 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20080116443.pdf [firstpage_image] =>[orig_patent_app_number] => 11854898 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/854898
PHASE CHANGE MEMORY DEVICE WITH HOLE FOR A LOWER ELECTRODE DEFINED IN A STABLE MANNER AND METHOD FOR MANUFACTURING THE SAME Sep 12, 2007 Abandoned
Array ( [id] => 4472370 [patent_doc_number] => 07944016 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-17 [patent_title] => 'Power managing semiconductor die with event detection circuitry in thick oxide for reduced power consumption' [patent_app_type] => utility [patent_app_number] => 11/897338 [patent_app_country] => US [patent_app_date] => 2007-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4565 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/944/07944016.pdf [firstpage_image] =>[orig_patent_app_number] => 11897338 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/897338
Power managing semiconductor die with event detection circuitry in thick oxide for reduced power consumption Aug 28, 2007 Issued
Array ( [id] => 587528 [patent_doc_number] => 07446395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-04 [patent_title] => 'Device having dual etch stop liner and protective layer' [patent_app_type] => utility [patent_app_number] => 11/845888 [patent_app_country] => US [patent_app_date] => 2007-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2515 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/446/07446395.pdf [firstpage_image] =>[orig_patent_app_number] => 11845888 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/845888
Device having dual etch stop liner and protective layer Aug 27, 2007 Issued
Array ( [id] => 6623773 [patent_doc_number] => 20100003790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-07 [patent_title] => 'METHOD FOR PRODUCING A MICROMECHANICAL COMPONENT HAVING A THIN-LAYER CAPPING' [patent_app_type] => utility [patent_app_number] => 12/305150 [patent_app_country] => US [patent_app_date] => 2007-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2378 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20100003790.pdf [firstpage_image] =>[orig_patent_app_number] => 12305150 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/305150
Method for producing a micromechanical component having a thin-layer capping Aug 20, 2007 Issued
Array ( [id] => 589421 [patent_doc_number] => 07435670 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-14 [patent_title] => 'Bit line barrier metal layer for semiconductor device and process for preparing the same' [patent_app_type] => utility [patent_app_number] => 11/842611 [patent_app_country] => US [patent_app_date] => 2007-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2894 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/435/07435670.pdf [firstpage_image] =>[orig_patent_app_number] => 11842611 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/842611
Bit line barrier metal layer for semiconductor device and process for preparing the same Aug 20, 2007 Issued
Array ( [id] => 373679 [patent_doc_number] => 07473983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-06 [patent_title] => 'Bipolar method and structure having improved BVCEO/RCS trade-off made with depletable collector columns' [patent_app_type] => utility [patent_app_number] => 11/835885 [patent_app_country] => US [patent_app_date] => 2007-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 34 [patent_no_of_words] => 8071 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/473/07473983.pdf [firstpage_image] =>[orig_patent_app_number] => 11835885 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/835885
Bipolar method and structure having improved BVCEO/RCS trade-off made with depletable collector columns Aug 7, 2007 Issued
Array ( [id] => 4523039 [patent_doc_number] => 07951649 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-31 [patent_title] => 'Process for the collective fabrication of 3D electronic modules' [patent_app_type] => utility [patent_app_number] => 12/438179 [patent_app_country] => US [patent_app_date] => 2007-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 3046 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 364 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/951/07951649.pdf [firstpage_image] =>[orig_patent_app_number] => 12438179 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/438179
Process for the collective fabrication of 3D electronic modules Aug 2, 2007 Issued
Array ( [id] => 285387 [patent_doc_number] => 07550313 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-23 [patent_title] => 'Method for delineation of phase change memory (PCM) cells separated by PCM and upper electrode regions modified to have high film resistivity' [patent_app_type] => utility [patent_app_number] => 11/781239 [patent_app_country] => US [patent_app_date] => 2007-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 33 [patent_no_of_words] => 8217 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/550/07550313.pdf [firstpage_image] =>[orig_patent_app_number] => 11781239 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/781239
Method for delineation of phase change memory (PCM) cells separated by PCM and upper electrode regions modified to have high film resistivity Jul 20, 2007 Issued
Array ( [id] => 4514165 [patent_doc_number] => 07910452 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Method for fabricating a cylinder-type capacitor utilizing a connected ring structure' [patent_app_type] => utility [patent_app_number] => 11/772034 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 48 [patent_no_of_words] => 13042 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/910/07910452.pdf [firstpage_image] =>[orig_patent_app_number] => 11772034 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/772034
Method for fabricating a cylinder-type capacitor utilizing a connected ring structure Jun 28, 2007 Issued
Array ( [id] => 4801988 [patent_doc_number] => 20080013575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-17 [patent_title] => 'METHOD FOR MANUFACTURING OPTICAL DEVICE, AND OPTICAL DEVICE WAFER' [patent_app_type] => utility [patent_app_number] => 11/769234 [patent_app_country] => US [patent_app_date] => 2007-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7797 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20080013575.pdf [firstpage_image] =>[orig_patent_app_number] => 11769234 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/769234
Method for manufacturing optical device, and optical device wafer Jun 26, 2007 Issued
Menu