Search

Tanya Theresa Ngo Motsinger

Examiner (ID: 10491, Phone: (571)270-7488 , Office: P/2637 )

Most Active Art Unit
2637
Art Unit(s)
2635, 2613, 2637
Total Applications
469
Issued Applications
358
Pending Applications
25
Abandoned Applications
99

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5085469 [patent_doc_number] => 20070275520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-29 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/798523 [patent_app_country] => US [patent_app_date] => 2007-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4558 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0275/20070275520.pdf [firstpage_image] =>[orig_patent_app_number] => 11798523 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/798523
Method of manufacturing semiconductor device using alignment mark and mark hole May 14, 2007 Issued
Array ( [id] => 5259241 [patent_doc_number] => 20070212873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-13 [patent_title] => 'Guard Ring for Improved Matching' [patent_app_type] => utility [patent_app_number] => 11/748569 [patent_app_country] => US [patent_app_date] => 2007-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6122 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20070212873.pdf [firstpage_image] =>[orig_patent_app_number] => 11748569 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/748569
Guard ring for improved matching May 14, 2007 Issued
Array ( [id] => 4775965 [patent_doc_number] => 20080283963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'Electrical Fuse Circuit for Security Applications' [patent_app_type] => utility [patent_app_number] => 11/748959 [patent_app_country] => US [patent_app_date] => 2007-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3923 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20080283963.pdf [firstpage_image] =>[orig_patent_app_number] => 11748959 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/748959
Electrical fuse circuit for security applications May 14, 2007 Issued
Array ( [id] => 4836882 [patent_doc_number] => 20080277765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-13 [patent_title] => 'INHIBITING DAMAGE FROM DICING AND CHIP PACKAGING INTERACTION FAILURES IN BACK END OF LINE STRUCTURES' [patent_app_type] => utility [patent_app_number] => 11/746684 [patent_app_country] => US [patent_app_date] => 2007-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9522 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0277/20080277765.pdf [firstpage_image] =>[orig_patent_app_number] => 11746684 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/746684
Using crack arrestor for inhibiting damage from dicing and chip packaging interaction failures in back end of line structures May 9, 2007 Issued
Array ( [id] => 5163139 [patent_doc_number] => 20070284720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'Power semiconductor device and method for its production' [patent_app_type] => utility [patent_app_number] => 11/746699 [patent_app_country] => US [patent_app_date] => 2007-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7311 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20070284720.pdf [firstpage_image] =>[orig_patent_app_number] => 11746699 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/746699
Power semiconductor device connected in distinct layers of plastic May 9, 2007 Issued
Array ( [id] => 5532541 [patent_doc_number] => 20090232329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-17 [patent_title] => 'EQUALIZATION METHOD USING EQUAL LOUDNESS CURVE, AND SOUND OUTPUT APPARATUS USING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/302389 [patent_app_country] => US [patent_app_date] => 2007-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3190 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20090232329.pdf [firstpage_image] =>[orig_patent_app_number] => 12302389 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/302389
Equalization method using equal loudness curve based on the IS0266:2003 standard, and sound output apparatus using the same May 8, 2007 Issued
Array ( [id] => 32446 [patent_doc_number] => 07790529 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-07 [patent_title] => 'Methods of forming memory arrays and semiconductor constructions' [patent_app_type] => utility [patent_app_number] => 11/745783 [patent_app_country] => US [patent_app_date] => 2007-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 31 [patent_no_of_words] => 5774 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/790/07790529.pdf [firstpage_image] =>[orig_patent_app_number] => 11745783 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/745783
Methods of forming memory arrays and semiconductor constructions May 7, 2007 Issued
Array ( [id] => 817465 [patent_doc_number] => 07411273 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-12 [patent_title] => 'Nitride semiconductor substrate' [patent_app_type] => utility [patent_app_number] => 11/744889 [patent_app_country] => US [patent_app_date] => 2007-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 9410 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/411/07411273.pdf [firstpage_image] =>[orig_patent_app_number] => 11744889 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/744889
Nitride semiconductor substrate May 6, 2007 Issued
Array ( [id] => 33670 [patent_doc_number] => 07791166 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-07 [patent_title] => 'Formation of dummy features and inductors in semiconductor fabrication' [patent_app_type] => utility [patent_app_number] => 11/744248 [patent_app_country] => US [patent_app_date] => 2007-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 3496 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/791/07791166.pdf [firstpage_image] =>[orig_patent_app_number] => 11744248 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/744248
Formation of dummy features and inductors in semiconductor fabrication May 3, 2007 Issued
Array ( [id] => 132812 [patent_doc_number] => 07701048 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-20 [patent_title] => 'Power module for low thermal resistance and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/743829 [patent_app_country] => US [patent_app_date] => 2007-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3464 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/701/07701048.pdf [firstpage_image] =>[orig_patent_app_number] => 11743829 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/743829
Power module for low thermal resistance and method of fabricating the same May 2, 2007 Issued
Array ( [id] => 5066672 [patent_doc_number] => 20070187773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-16 [patent_title] => 'STRUCTURE AND METHOD TO INDUCE STRAIN IN A SEMICONDUCTOR DEVICE CHANNEL WITH STRESSED FILM UNDER THE GATE' [patent_app_type] => utility [patent_app_number] => 11/738883 [patent_app_country] => US [patent_app_date] => 2007-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3231 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0187/20070187773.pdf [firstpage_image] =>[orig_patent_app_number] => 11738883 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/738883
STRUCTURE AND METHOD TO INDUCE STRAIN IN A SEMICONDUCTOR DEVICE CHANNEL WITH STRESSED FILM UNDER THE GATE Apr 22, 2007 Abandoned
Array ( [id] => 377038 [patent_doc_number] => 07312138 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-25 [patent_title] => 'Semiconductor device and method of manufacture thereof' [patent_app_type] => utility [patent_app_number] => 11/790033 [patent_app_country] => US [patent_app_date] => 2007-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 66 [patent_no_of_words] => 13422 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/312/07312138.pdf [firstpage_image] =>[orig_patent_app_number] => 11790033 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/790033
Semiconductor device and method of manufacture thereof Apr 22, 2007 Issued
Array ( [id] => 4977373 [patent_doc_number] => 20070218606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'Semiconductor device and method of manufacture thereof' [patent_app_type] => utility [patent_app_number] => 11/790064 [patent_app_country] => US [patent_app_date] => 2007-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13428 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20070218606.pdf [firstpage_image] =>[orig_patent_app_number] => 11790064 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/790064
Semiconductor device and method of manufacture thereof Apr 22, 2007 Issued
Array ( [id] => 5043660 [patent_doc_number] => 20070262331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-15 [patent_title] => 'SEMICONDUCTOR DEVICE, LED PRINTHEAD, AND IMAGE FORMING APPARATUS' [patent_app_type] => utility [patent_app_number] => 11/738557 [patent_app_country] => US [patent_app_date] => 2007-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6156 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20070262331.pdf [firstpage_image] =>[orig_patent_app_number] => 11738557 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/738557
Semiconductor light emitting device with stress absorber, LED printhead, and image forming apparatus Apr 22, 2007 Issued
Array ( [id] => 5110447 [patent_doc_number] => 20070194362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-23 [patent_title] => 'Semiconductor Device and Process for Production Thereof' [patent_app_type] => utility [patent_app_number] => 11/738599 [patent_app_country] => US [patent_app_date] => 2007-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 17807 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20070194362.pdf [firstpage_image] =>[orig_patent_app_number] => 11738599 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/738599
Semiconductor device and process for production thereof Apr 22, 2007 Issued
Array ( [id] => 5129044 [patent_doc_number] => 20070205441 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-06 [patent_title] => 'Manufacturing method of semiconductor device suppressing short-channel effect' [patent_app_type] => utility [patent_app_number] => 11/785465 [patent_app_country] => US [patent_app_date] => 2007-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5083 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20070205441.pdf [firstpage_image] =>[orig_patent_app_number] => 11785465 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/785465
Manufacturing method of semiconductor device suppressing short-channel effect Apr 17, 2007 Issued
Array ( [id] => 5084311 [patent_doc_number] => 20070274362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-29 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/783853 [patent_app_country] => US [patent_app_date] => 2007-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9729 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0274/20070274362.pdf [firstpage_image] =>[orig_patent_app_number] => 11783853 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/783853
Semiconductor device Apr 11, 2007 Abandoned
Array ( [id] => 22122 [patent_doc_number] => 07799588 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-21 [patent_title] => 'Method of manufacturing the optical device by a stopper to form an oxide block' [patent_app_type] => utility [patent_app_number] => 11/783434 [patent_app_country] => US [patent_app_date] => 2007-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 69 [patent_no_of_words] => 19779 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/799/07799588.pdf [firstpage_image] =>[orig_patent_app_number] => 11783434 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/783434
Method of manufacturing the optical device by a stopper to form an oxide block Apr 9, 2007 Issued
Array ( [id] => 5537923 [patent_doc_number] => 20090219728 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-03 [patent_title] => 'SUBMOUNT AND ITS MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 12/295740 [patent_app_country] => US [patent_app_date] => 2007-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7317 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20090219728.pdf [firstpage_image] =>[orig_patent_app_number] => 12295740 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/295740
Submount for optical device and its manufacturing method Apr 3, 2007 Issued
Array ( [id] => 4715358 [patent_doc_number] => 20080237880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PROTECTED CONDUCTIVE LAYERS' [patent_app_type] => utility [patent_app_number] => 11/694907 [patent_app_country] => US [patent_app_date] => 2007-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6122 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20080237880.pdf [firstpage_image] =>[orig_patent_app_number] => 11694907 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/694907
Integrated circuit package system with protected conductive layers for pads and method of manufacturing thereof Mar 29, 2007 Issued
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