
Tanya Theresa Ngo Motsinger
Examiner (ID: 10491, Phone: (571)270-7488 , Office: P/2637 )
| Most Active Art Unit | 2637 |
| Art Unit(s) | 2635, 2613, 2637 |
| Total Applications | 469 |
| Issued Applications | 358 |
| Pending Applications | 25 |
| Abandoned Applications | 99 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4749193
[patent_doc_number] => 20080157264
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-03
[patent_title] => 'Shallow trench isolation devices and methods'
[patent_app_type] => utility
[patent_app_number] => 11/654329
[patent_app_country] => US
[patent_app_date] => 2007-01-17
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0157/20080157264.pdf
[firstpage_image] =>[orig_patent_app_number] => 11654329
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/654329 | Method of forming an isolation structure by performing multiple high-density plasma depositions | Jan 16, 2007 | Issued |
Array
(
[id] => 4825870
[patent_doc_number] => 20080124834
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[patent_kind] => A1
[patent_issue_date] => 2008-05-29
[patent_title] => 'Mounting method of semiconductor element and manufacturing method of semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/653954
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[patent_app_date] => 2007-01-17
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[firstpage_image] =>[orig_patent_app_number] => 11653954
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/653954 | Mounting method of semiconductor element using outside connection projection electyrode and manufacturing method of semiconductor device using outside connection projection electrode | Jan 16, 2007 | Issued |
Array
(
[id] => 4805926
[patent_doc_number] => 20080169504
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[patent_kind] => A1
[patent_issue_date] => 2008-07-17
[patent_title] => 'Semiconductor constructions, methods of forming semiconductor constructions, and methods of recessing materials within openings'
[patent_app_type] => utility
[patent_app_number] => 11/652863
[patent_app_country] => US
[patent_app_date] => 2007-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/652863 | Methods of forming semiconductor constructions, and methods of recessing materials within openings | Jan 11, 2007 | Issued |
Array
(
[id] => 5159924
[patent_doc_number] => 20070172968
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-26
[patent_title] => 'Method of processing semiconductor substrate'
[patent_app_type] => utility
[patent_app_number] => 11/651863
[patent_app_country] => US
[patent_app_date] => 2007-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[firstpage_image] =>[orig_patent_app_number] => 11651863
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/651863 | Method of processing semiconductor substrate | Jan 9, 2007 | Abandoned |
Array
(
[id] => 278338
[patent_doc_number] => 07557415
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-07
[patent_title] => 'Trench isolation type semiconductor device and related method of manufacture'
[patent_app_type] => utility
[patent_app_number] => 11/650418
[patent_app_country] => US
[patent_app_date] => 2007-01-08
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/557/07557415.pdf
[firstpage_image] =>[orig_patent_app_number] => 11650418
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/650418 | Trench isolation type semiconductor device and related method of manufacture | Jan 7, 2007 | Issued |
Array
(
[id] => 4971390
[patent_doc_number] => 20070111392
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-05-17
[patent_title] => 'Method for thermally releasing chip cut piece from thermal release type pressure sensitive adhesive sheet, electronic component and circuit board'
[patent_app_type] => utility
[patent_app_number] => 11/650449
[patent_app_country] => US
[patent_app_date] => 2007-01-08
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/650449 | Method for thermally releasing chip cut piece from thermal release type pressure sensitive adhesive sheet, electronic component and circuit board | Jan 7, 2007 | Abandoned |
Array
(
[id] => 122712
[patent_doc_number] => 07709874
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[patent_title] => 'Semiconductor device having a split gate structure with a recessed top face electrode'
[patent_app_type] => utility
[patent_app_number] => 11/649208
[patent_app_country] => US
[patent_app_date] => 2007-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/649208 | Semiconductor device having a split gate structure with a recessed top face electrode | Jan 3, 2007 | Issued |
Array
(
[id] => 4925214
[patent_doc_number] => 20080164577
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-10
[patent_title] => 'Patterned silicon submicron tubes'
[patent_app_type] => utility
[patent_app_number] => 11/649634
[patent_app_country] => US
[patent_app_date] => 2007-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 3860
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[firstpage_image] =>[orig_patent_app_number] => 11649634
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/649634 | Patterned silicon submicron tubes | Jan 3, 2007 | Issued |
Array
(
[id] => 270418
[patent_doc_number] => 07563654
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-21
[patent_title] => 'Method of manufacturing semiconductor device for formation of pin transistor'
[patent_app_type] => utility
[patent_app_number] => 11/647759
[patent_app_country] => US
[patent_app_date] => 2006-12-29
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[firstpage_image] =>[orig_patent_app_number] => 11647759
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/647759 | Method of manufacturing semiconductor device for formation of pin transistor | Dec 28, 2006 | Issued |
Array
(
[id] => 204493
[patent_doc_number] => 07629213
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-12-08
[patent_title] => 'Method of manufacturing flash memory device with void between gate patterns'
[patent_app_type] => utility
[patent_app_number] => 11/647628
[patent_app_country] => US
[patent_app_date] => 2006-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/07/629/07629213.pdf
[firstpage_image] =>[orig_patent_app_number] => 11647628
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/647628 | Method of manufacturing flash memory device with void between gate patterns | Dec 28, 2006 | Issued |
Array
(
[id] => 13655
[patent_doc_number] => 07803681
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-09-28
[patent_title] => 'Semiconductor device with a bulb-type recess gate'
[patent_app_type] => utility
[patent_app_number] => 11/647328
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/647328 | Semiconductor device with a bulb-type recess gate | Dec 28, 2006 | Issued |
Array
(
[id] => 4932999
[patent_doc_number] => 20080003774
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[patent_title] => 'Semiconductor device manufactured with a double shallow trench isolation process'
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[patent_app_number] => 11/647324
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/647324 | Semiconductor device manufactured with a double shallow trench isolation process | Dec 28, 2006 | Issued |
Array
(
[id] => 4772036
[patent_doc_number] => 20080057694
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[patent_title] => 'Method for manufacturing semiconductor device'
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[firstpage_image] =>[orig_patent_app_number] => 11646699
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/646699 | Method for manufacturing semiconductor device | Dec 27, 2006 | Abandoned |
Array
(
[id] => 5085468
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[patent_title] => 'Method of manufacturing non-volatile memory device'
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Array
(
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[patent_title] => 'Semiconductor device having recess gate and method of fabricating the same'
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Array
(
[id] => 5095741
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[patent_title] => 'STRAINED SILICON ON INSULATOR (SSOI) WITH LAYER TRANSFER FROM OXIDIZED DONOR'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/616517 | STRAINED SILICON ON INSULATOR (SSOI) WITH LAYER TRANSFER FROM OXIDIZED DONOR | Dec 26, 2006 | Abandoned |
Array
(
[id] => 4988700
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[patent_title] => 'Method for manufacturing CMOS image sensor'
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[patent_app_number] => 11/646803
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/646803 | Method for manufacturing CMOS image sensor | Dec 26, 2006 | Abandoned |
Array
(
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/645488 | Method of making a semiconductor chip assembly with thermal conductor and encapsulant grinding | Dec 25, 2006 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/644259 | Transistors with recessed active trenches for increased effective gate width | Dec 21, 2006 | Issued |