Search

Tanya Theresa Ngo Motsinger

Examiner (ID: 10491, Phone: (571)270-7488 , Office: P/2637 )

Most Active Art Unit
2637
Art Unit(s)
2635, 2613, 2637
Total Applications
469
Issued Applications
358
Pending Applications
25
Abandoned Applications
99

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4777253 [patent_doc_number] => 20080285251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'Packaging Substrate with Flat Bumps for Electronic Devices and Method of Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 11/910893 [patent_app_country] => US [patent_app_date] => 2006-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2828 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20080285251.pdf [firstpage_image] =>[orig_patent_app_number] => 11910893 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/910893
Packaging Substrate with Flat Bumps for Electronic Devices and Method of Manufacturing the Same Apr 5, 2006 Abandoned
Array ( [id] => 5208180 [patent_doc_number] => 20070246764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'Low-temperature metal-induced crystallization of silicon-germanium films' [patent_app_type] => utility [patent_app_number] => 11/395420 [patent_app_country] => US [patent_app_date] => 2006-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7656 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20070246764.pdf [firstpage_image] =>[orig_patent_app_number] => 11395420 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/395420
Low-temperature metal-induced crystallization of silicon-germanium films Mar 30, 2006 Issued
Array ( [id] => 5421516 [patent_doc_number] => 20090147971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-11 [patent_title] => 'PHONE AND VOLUME CONTROL UNIT' [patent_app_type] => utility [patent_app_number] => 12/294219 [patent_app_country] => US [patent_app_date] => 2006-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 5995 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20090147971.pdf [firstpage_image] =>[orig_patent_app_number] => 12294219 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/294219
Volume control unit Mar 23, 2006 Issued
Array ( [id] => 5063147 [patent_doc_number] => 20070224787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-27 [patent_title] => 'Relaxed heteroepitaxial layers' [patent_app_type] => utility [patent_app_number] => 11/388313 [patent_app_country] => US [patent_app_date] => 2006-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6759 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20070224787.pdf [firstpage_image] =>[orig_patent_app_number] => 11388313 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/388313
Heteroepitaxial deposition over an oxidized surface Mar 22, 2006 Issued
Array ( [id] => 4977452 [patent_doc_number] => 20070218685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'Method of forming trench contacts for MOS transistors' [patent_app_type] => utility [patent_app_number] => 11/384143 [patent_app_country] => US [patent_app_date] => 2006-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4103 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20070218685.pdf [firstpage_image] =>[orig_patent_app_number] => 11384143 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/384143
Method of forming trench contacts for MOS transistors Mar 16, 2006 Abandoned
Array ( [id] => 4977368 [patent_doc_number] => 20070218601 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'Thin film transistor substrate for liquid crystal display device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/378799 [patent_app_country] => US [patent_app_date] => 2006-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 41 [patent_no_of_words] => 13983 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20070218601.pdf [firstpage_image] =>[orig_patent_app_number] => 11378799 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/378799
Display device having an aluminum complex oxide on metal layer for improving corrosion resistance Mar 15, 2006 Issued
Array ( [id] => 202450 [patent_doc_number] => 07632696 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-15 [patent_title] => 'Semiconductor chip with a porous single crystal layer and manufacturing method of the same' [patent_app_type] => utility [patent_app_number] => 11/372351 [patent_app_country] => US [patent_app_date] => 2006-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 8832 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/632/07632696.pdf [firstpage_image] =>[orig_patent_app_number] => 11372351 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/372351
Semiconductor chip with a porous single crystal layer and manufacturing method of the same Mar 9, 2006 Issued
Array ( [id] => 359669 [patent_doc_number] => 07485548 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-03 [patent_title] => 'Die loss estimation using universal in-line metric (UILM)' [patent_app_type] => utility [patent_app_number] => 11/276719 [patent_app_country] => US [patent_app_date] => 2006-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7367 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/485/07485548.pdf [firstpage_image] =>[orig_patent_app_number] => 11276719 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/276719
Die loss estimation using universal in-line metric (UILM) Mar 9, 2006 Issued
Array ( [id] => 894976 [patent_doc_number] => 07341904 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-11 [patent_title] => 'Capacitorless 1-transistor DRAM cell and fabrication method' [patent_app_type] => utility [patent_app_number] => 11/367731 [patent_app_country] => US [patent_app_date] => 2006-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2608 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/341/07341904.pdf [firstpage_image] =>[orig_patent_app_number] => 11367731 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/367731
Capacitorless 1-transistor DRAM cell and fabrication method Mar 2, 2006 Issued
Array ( [id] => 5171877 [patent_doc_number] => 20070072310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/364224 [patent_app_country] => US [patent_app_date] => 2006-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5331 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20070072310.pdf [firstpage_image] =>[orig_patent_app_number] => 11364224 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/364224
Semiconductor device and method of manufacturing the same Feb 28, 2006 Abandoned
Array ( [id] => 5785651 [patent_doc_number] => 20060205180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Applications and equipment of substrate stiffness method and resulting devices for layer transfer processes on quartz or glass' [patent_app_type] => utility [patent_app_number] => 11/361834 [patent_app_country] => US [patent_app_date] => 2006-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 22085 [patent_no_of_claims] => 186 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20060205180.pdf [firstpage_image] =>[orig_patent_app_number] => 11361834 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/361834
Method for manufacturing devices on a multi-layered substrate utilizing a stiffening backing substrate Feb 23, 2006 Issued
Array ( [id] => 5780196 [patent_doc_number] => 20060202291 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Magnetoresistive sensor module and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/360538 [patent_app_country] => US [patent_app_date] => 2006-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9287 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20060202291.pdf [firstpage_image] =>[orig_patent_app_number] => 11360538 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/360538
Magnetoresistive sensor module with a structured metal sheet for illumination and method for manufacturing the same Feb 22, 2006 Issued
Array ( [id] => 5700247 [patent_doc_number] => 20060216932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'Plasma pre-treating surfaces for atomic layer deposition' [patent_app_type] => utility [patent_app_number] => 11/359884 [patent_app_country] => US [patent_app_date] => 2006-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 16953 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20060216932.pdf [firstpage_image] =>[orig_patent_app_number] => 11359884 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/359884
Plasma pre-treating surfaces for atomic layer deposition Feb 20, 2006 Issued
Array ( [id] => 5616890 [patent_doc_number] => 20060186422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Etching a nitride-based heterostructure' [patent_app_type] => utility [patent_app_number] => 11/358303 [patent_app_country] => US [patent_app_date] => 2006-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4203 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20060186422.pdf [firstpage_image] =>[orig_patent_app_number] => 11358303 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/358303
Etching a nitride-based heterostructure Feb 20, 2006 Issued
Array ( [id] => 5619604 [patent_doc_number] => 20060189138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Method of processing substrate, post-chemical mechanical polishing cleaning method, and method of and program for manufacturing electronic device' [patent_app_type] => utility [patent_app_number] => 11/353154 [patent_app_country] => US [patent_app_date] => 2006-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 17893 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20060189138.pdf [firstpage_image] =>[orig_patent_app_number] => 11353154 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/353154
Method of processing substrate, post-chemical mechanical polishing cleaning method, and method of and program for manufacturing electronic device Feb 13, 2006 Issued
Array ( [id] => 5645861 [patent_doc_number] => 20060131593 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-22 [patent_title] => 'Semiconductor laser, manufacturing the same and semiconductor laser device' [patent_app_type] => utility [patent_app_number] => 11/350096 [patent_app_country] => US [patent_app_date] => 2006-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 10321 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20060131593.pdf [firstpage_image] =>[orig_patent_app_number] => 11350096 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/350096
Semiconductor laser, manufacturing the same and semiconductor laser device Feb 8, 2006 Issued
Array ( [id] => 5596365 [patent_doc_number] => 20060160282 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-20 [patent_title] => 'Thin film transistor array panel and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/336087 [patent_app_country] => US [patent_app_date] => 2006-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6488 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20060160282.pdf [firstpage_image] =>[orig_patent_app_number] => 11336087 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/336087
Thin film transistor array panel and manufacturing method thereof Jan 19, 2006 Issued
Array ( [id] => 5843625 [patent_doc_number] => 20060121710 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'Thermal conducting trench in a semiconductor structure' [patent_app_type] => utility [patent_app_number] => 11/331321 [patent_app_country] => US [patent_app_date] => 2006-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4728 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20060121710.pdf [firstpage_image] =>[orig_patent_app_number] => 11331321 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/331321
Thermal conducting trench in a semiconductor structure Jan 10, 2006 Issued
Array ( [id] => 5756845 [patent_doc_number] => 20060207790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-21 [patent_title] => 'Bonding pads having slotted metal pad and meshed via pattern' [patent_app_type] => utility [patent_app_number] => 11/327327 [patent_app_country] => US [patent_app_date] => 2006-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6570 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20060207790.pdf [firstpage_image] =>[orig_patent_app_number] => 11327327 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/327327
Bonding pads having slotted metal pad and meshed via pattern Jan 8, 2006 Abandoned
Array ( [id] => 4988765 [patent_doc_number] => 20070155104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-05 [patent_title] => 'Power device utilizing chemical mechanical planarization' [patent_app_type] => utility [patent_app_number] => 11/327657 [patent_app_country] => US [patent_app_date] => 2006-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 11217 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20070155104.pdf [firstpage_image] =>[orig_patent_app_number] => 11327657 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/327657
Trench-gated FET for power device with active gate trenches and gate runner trench utilizing one-mask etch Jan 4, 2006 Issued
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