Search

Tanya Theresa Ngo Motsinger

Examiner (ID: 10491, Phone: (571)270-7488 , Office: P/2637 )

Most Active Art Unit
2637
Art Unit(s)
2635, 2613, 2637
Total Applications
469
Issued Applications
358
Pending Applications
25
Abandoned Applications
99

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 91875 [patent_doc_number] => 07736939 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-15 [patent_title] => 'Method for forming microlenses of different curvatures and fabricating process of solid-state image sensor' [patent_app_type] => utility [patent_app_number] => 11/160739 [patent_app_country] => US [patent_app_date] => 2005-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2258 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/736/07736939.pdf [firstpage_image] =>[orig_patent_app_number] => 11160739 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/160739
Method for forming microlenses of different curvatures and fabricating process of solid-state image sensor Jul 6, 2005 Issued
Array ( [id] => 5239715 [patent_doc_number] => 20070018206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Surround gate access transistors with grown ultra-thin bodies' [patent_app_type] => utility [patent_app_number] => 11/175677 [patent_app_country] => US [patent_app_date] => 2005-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4639 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20070018206.pdf [firstpage_image] =>[orig_patent_app_number] => 11175677 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/175677
Surround gate access transistors with grown ultra-thin bodies Jul 5, 2005 Issued
Array ( [id] => 84618 [patent_doc_number] => 07741710 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-22 [patent_title] => 'Module with multiple power amplifiers and power sensors' [patent_app_type] => utility [patent_app_number] => 11/173739 [patent_app_country] => US [patent_app_date] => 2005-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3806 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/741/07741710.pdf [firstpage_image] =>[orig_patent_app_number] => 11173739 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/173739
Module with multiple power amplifiers and power sensors Jul 1, 2005 Issued
Array ( [id] => 817412 [patent_doc_number] => 07411220 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-12 [patent_title] => 'Semiconductor light emitting device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/154814 [patent_app_country] => US [patent_app_date] => 2005-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 47 [patent_no_of_words] => 16877 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/411/07411220.pdf [firstpage_image] =>[orig_patent_app_number] => 11154814 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/154814
Semiconductor light emitting device and manufacturing method thereof Jun 16, 2005 Issued
Array ( [id] => 6966702 [patent_doc_number] => 20050233599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-20 [patent_title] => 'Method for producing material of electronic device' [patent_app_type] => utility [patent_app_number] => 11/153551 [patent_app_country] => US [patent_app_date] => 2005-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9406 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20050233599.pdf [firstpage_image] =>[orig_patent_app_number] => 11153551 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/153551
Method for producing material of electronic device Jun 15, 2005 Abandoned
Array ( [id] => 7056071 [patent_doc_number] => 20050277246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-15 [patent_title] => 'Formation of doped regions and/or ultra-shallow junctions in semiconductor materials by gas-cluster ion irradiation' [patent_app_type] => utility [patent_app_number] => 11/150698 [patent_app_country] => US [patent_app_date] => 2005-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8387 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0277/20050277246.pdf [firstpage_image] =>[orig_patent_app_number] => 11150698 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/150698
Formation of doped regions and/or ultra-shallow junctions in semiconductor materials by gas-cluster ion irradiation Jun 10, 2005 Issued
Array ( [id] => 91994 [patent_doc_number] => 07732307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-08 [patent_title] => 'Method of forming amorphous TiN by thermal chemical vapor deposition (CVD)' [patent_app_type] => utility [patent_app_number] => 11/143953 [patent_app_country] => US [patent_app_date] => 2005-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3159 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/732/07732307.pdf [firstpage_image] =>[orig_patent_app_number] => 11143953 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/143953
Method of forming amorphous TiN by thermal chemical vapor deposition (CVD) Jun 2, 2005 Issued
Array ( [id] => 6958620 [patent_doc_number] => 20050214990 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-29 [patent_title] => 'Electric device, matrix device, electro-optical display device, and semiconductor memory having thin-film transistors' [patent_app_type] => utility [patent_app_number] => 11/139494 [patent_app_country] => US [patent_app_date] => 2005-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7231 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20050214990.pdf [firstpage_image] =>[orig_patent_app_number] => 11139494 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/139494
Electric device, matrix device, electro-optical display device, and semiconductor memory having thin-film transistors May 30, 2005 Issued
Array ( [id] => 7213750 [patent_doc_number] => 20050253149 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-17 [patent_title] => 'Semiconductor device and process for production thereof' [patent_app_type] => utility [patent_app_number] => 11/120175 [patent_app_country] => US [patent_app_date] => 2005-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 17809 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20050253149.pdf [firstpage_image] =>[orig_patent_app_number] => 11120175 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/120175
Semiconductor device and process for production thereof May 1, 2005 Issued
Array ( [id] => 637799 [patent_doc_number] => 07125752 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-24 [patent_title] => 'Methods for making microwave circuits including a ground plane' [patent_app_type] => utility [patent_app_number] => 11/113753 [patent_app_country] => US [patent_app_date] => 2005-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 4617 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/125/07125752.pdf [firstpage_image] =>[orig_patent_app_number] => 11113753 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/113753
Methods for making microwave circuits including a ground plane Apr 24, 2005 Issued
Array ( [id] => 7043380 [patent_doc_number] => 20050247975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-10 [patent_title] => 'Semiconductor devices and methods of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/112533 [patent_app_country] => US [patent_app_date] => 2005-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2476 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0247/20050247975.pdf [firstpage_image] =>[orig_patent_app_number] => 11112533 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/112533
Semiconductor devices and methods of manufacturing the same Apr 21, 2005 Issued
Array ( [id] => 459798 [patent_doc_number] => 07241677 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-10 [patent_title] => 'Process for producing integrated circuits including reduction using gaseous organic compounds' [patent_app_type] => utility [patent_app_number] => 11/110345 [patent_app_country] => US [patent_app_date] => 2005-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12000 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/241/07241677.pdf [firstpage_image] =>[orig_patent_app_number] => 11110345 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/110345
Process for producing integrated circuits including reduction using gaseous organic compounds Apr 18, 2005 Issued
Array ( [id] => 475095 [patent_doc_number] => 07226820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-05 [patent_title] => 'Transistor fabrication using double etch/refill process' [patent_app_type] => utility [patent_app_number] => 11/101354 [patent_app_country] => US [patent_app_date] => 2005-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2174 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/226/07226820.pdf [firstpage_image] =>[orig_patent_app_number] => 11101354 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/101354
Transistor fabrication using double etch/refill process Apr 6, 2005 Issued
Array ( [id] => 5880984 [patent_doc_number] => 20060030067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Method for manufacturing organic thin-film transistor with plastic substrate' [patent_app_type] => utility [patent_app_number] => 11/095594 [patent_app_country] => US [patent_app_date] => 2005-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2700 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20060030067.pdf [firstpage_image] =>[orig_patent_app_number] => 11095594 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/095594
Method for manufacturing organic thin-film transistor with plastic substrate Mar 31, 2005 Issued
Array ( [id] => 4640032 [patent_doc_number] => 08018059 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-13 [patent_title] => 'Electrical interconnect with an electrical pathway including at least a first member overlain by a second member at a contact point' [patent_app_type] => utility [patent_app_number] => 11/094407 [patent_app_country] => US [patent_app_date] => 2005-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6116 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/018/08018059.pdf [firstpage_image] =>[orig_patent_app_number] => 11094407 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/094407
Electrical interconnect with an electrical pathway including at least a first member overlain by a second member at a contact point Mar 30, 2005 Issued
Array ( [id] => 4532456 [patent_doc_number] => 07923806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-12 [patent_title] => 'Embedded wiring in copper damascene with void suppressing structure' [patent_app_type] => utility [patent_app_number] => 11/084014 [patent_app_country] => US [patent_app_date] => 2005-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 7406 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/923/07923806.pdf [firstpage_image] =>[orig_patent_app_number] => 11084014 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/084014
Embedded wiring in copper damascene with void suppressing structure Mar 20, 2005 Issued
Array ( [id] => 4551224 [patent_doc_number] => 07820473 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-26 [patent_title] => 'Schottky diode and method of manufacture' [patent_app_type] => utility [patent_app_number] => 11/084524 [patent_app_country] => US [patent_app_date] => 2005-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3191 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/820/07820473.pdf [firstpage_image] =>[orig_patent_app_number] => 11084524 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/084524
Schottky diode and method of manufacture Mar 20, 2005 Issued
Array ( [id] => 307362 [patent_doc_number] => 07531428 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-12 [patent_title] => 'Recycling the reconditioned substrates for fabricating compound material wafers' [patent_app_type] => utility [patent_app_number] => 11/084553 [patent_app_country] => US [patent_app_date] => 2005-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 12 [patent_no_of_words] => 4732 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/531/07531428.pdf [firstpage_image] =>[orig_patent_app_number] => 11084553 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/084553
Recycling the reconditioned substrates for fabricating compound material wafers Mar 17, 2005 Issued
Array ( [id] => 5760295 [patent_doc_number] => 20060211240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-21 [patent_title] => 'Method of enhancing adhesion between dielectric layers' [patent_app_type] => utility [patent_app_number] => 11/084494 [patent_app_country] => US [patent_app_date] => 2005-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3336 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0211/20060211240.pdf [firstpage_image] =>[orig_patent_app_number] => 11084494 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/084494
Method of enhancing adhesion between dielectric layers Mar 17, 2005 Abandoned
Array ( [id] => 6958677 [patent_doc_number] => 20050215047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-29 [patent_title] => 'Method of manufacturing a semiconductor device having damascene structures with air gaps' [patent_app_type] => utility [patent_app_number] => 11/083344 [patent_app_country] => US [patent_app_date] => 2005-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3261 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20050215047.pdf [firstpage_image] =>[orig_patent_app_number] => 11083344 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/083344
Method of manufacturing a semiconductor device having damascene structures with air gaps Mar 15, 2005 Issued
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