Tanya Theresa Ngo Motsinger

Array ( [id] => 5785702 [patent_doc_number] => 20060205204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Method of making a semiconductor interconnect with a metal cap' [patent_app_type] => utility [patent_app_number] => 11/079843 [patent_app_country] => US [patent_app_date] => 2005-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4725 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20060205204.pdf [firstpage_image] =>[orig_patent_app_number] => 11079843 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 442780 [patent_doc_number] => 07256085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-14 [patent_title] => 'Semiconductor memory device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/077233 [patent_app_country] => US [patent_app_date] => 2005-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 72 [patent_no_of_words] => 7793 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/256/07256085.pdf [firstpage_image] =>[orig_patent_app_number] => 11077233 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5780257 [patent_doc_number] => 20060202352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Magnetron sputtered metallization of a nickel silicon alloy, especially useful as solder bump barrier' [patent_app_type] => utility [patent_app_number] => 11/077943 [patent_app_country] => US [patent_app_date] => 2005-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4966 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20060202352.pdf [firstpage_image] =>[orig_patent_app_number] => 11077943 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5780128 [patent_doc_number] => 20060202223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'INCREASED LIGHT EXTRACTION FROM A NITRIDE LED' [patent_app_type] => utility [patent_app_number] => 11/075974 [patent_app_country] => US [patent_app_date] => 2005-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2433 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20060202223.pdf [firstpage_image] =>[orig_patent_app_number] => 11075974 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 533836 [patent_doc_number] => 07176052 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-13 [patent_title] => 'Capacitor, circuit board, method of formation of capacitor, and method of production of circuit board' [patent_app_type] => utility [patent_app_number] => 11/068884 [patent_app_country] => US [patent_app_date] => 2005-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 36 [patent_no_of_words] => 6081 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/176/07176052.pdf [firstpage_image] =>[orig_patent_app_number] => 11068884 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5683102 [patent_doc_number] => 20060199372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-07 [patent_title] => 'Reduction of copper dewetting by transition metal deposition' [patent_app_type] => utility [patent_app_number] => 11/069514 [patent_app_country] => US [patent_app_date] => 2005-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7375 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20060199372.pdf [firstpage_image] =>[orig_patent_app_number] => 11069514 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5865678 [patent_doc_number] => 20060099809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Method of flip-chip mounting a semiconductor chip and mounting apparatus using the same' [patent_app_type] => utility [patent_app_number] => 11/066483 [patent_app_country] => US [patent_app_date] => 2005-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4494 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20060099809.pdf [firstpage_image] =>[orig_patent_app_number] => 11066483 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5705372 [patent_doc_number] => 20060194420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Multilayer film' [patent_app_type] => utility [patent_app_number] => 11/068363 [patent_app_country] => US [patent_app_date] => 2005-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3552 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20060194420.pdf [firstpage_image] =>[orig_patent_app_number] => 11068363 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5619516 [patent_doc_number] => 20060189050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Method of forming a semiconductor device and an optical device and structure thereof' [patent_app_type] => utility [patent_app_number] => 11/065324 [patent_app_country] => US [patent_app_date] => 2005-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4339 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20060189050.pdf [firstpage_image] =>[orig_patent_app_number] => 11065324 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5619480 [patent_doc_number] => 20060189014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'High-luminescence silicon electroluminescence device' [patent_app_type] => utility [patent_app_number] => 11/066713 [patent_app_country] => US [patent_app_date] => 2005-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5979 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20060189014.pdf [firstpage_image] =>[orig_patent_app_number] => 11066713 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7110867 [patent_doc_number] => 20050208322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-22 [patent_title] => 'Method for treating substrates for microelectronics and substrates obtained by said method' [patent_app_type] => utility [patent_app_number] => 11/063867 [patent_app_country] => US [patent_app_date] => 2005-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7113 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20050208322.pdf [firstpage_image] =>[orig_patent_app_number] => 11063867 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6964834 [patent_doc_number] => 20050231731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-20 [patent_title] => 'Systems and methods for fabricating thin films' [patent_app_type] => utility [patent_app_number] => 11/066654 [patent_app_country] => US [patent_app_date] => 2005-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2923 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20050231731.pdf [firstpage_image] =>[orig_patent_app_number] => 11066654 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 904339 [patent_doc_number] => 07335956 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-26 [patent_title] => 'Capacitor device with vertically arranged capacitor regions of various kinds' [patent_app_type] => utility [patent_app_number] => 11/055933 [patent_app_country] => US [patent_app_date] => 2005-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2421 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/335/07335956.pdf [firstpage_image] =>[orig_patent_app_number] => 11055933 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 439212 [patent_doc_number] => 07259051 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-21 [patent_title] => 'Method of forming SI tip by single etching process and its application for forming floating gate' [patent_app_type] => utility [patent_app_number] => 11/050963 [patent_app_country] => US [patent_app_date] => 2005-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 2830 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/259/07259051.pdf [firstpage_image] =>[orig_patent_app_number] => 11050963 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5838296 [patent_doc_number] => 20060118954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-08 [patent_title] => 'Bit line barrier metal layer for semiconductor device and process for preparing the same' [patent_app_type] => utility [patent_app_number] => 11/052403 [patent_app_country] => US [patent_app_date] => 2005-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2857 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0118/20060118954.pdf [firstpage_image] =>[orig_patent_app_number] => 11052403 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5667123 [patent_doc_number] => 20060172473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'METHOD OF FORMING A TWO-LAYER GATE DIELECTRIC' [patent_app_type] => utility [patent_app_number] => 10/906104 [patent_app_country] => US [patent_app_date] => 2005-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 1604 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20060172473.pdf [firstpage_image] =>[orig_patent_app_number] => 10906104 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5667150 [patent_doc_number] => 20060172500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'STUCTURE AND METHOD TO INDUCE STRAIN IN A SEMICONDUCTOR DEVICE CHANNEL WITH STRESSED FILM UNDER THE GATE' [patent_app_type] => utility [patent_app_number] => 10/906054 [patent_app_country] => US [patent_app_date] => 2005-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3193 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20060172500.pdf [firstpage_image] =>[orig_patent_app_number] => 10906054 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5667164 [patent_doc_number] => 20060172514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'REDUCING WIRE EROSION DURING DAMASCENE PROCESSING' [patent_app_type] => utility [patent_app_number] => 10/906013 [patent_app_country] => US [patent_app_date] => 2005-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3933 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20060172514.pdf [firstpage_image] =>[orig_patent_app_number] => 10906013 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 485464 [patent_doc_number] => 07217604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-15 [patent_title] => 'Structure and method for thin box SOI device' [patent_app_type] => utility [patent_app_number] => 10/906014 [patent_app_country] => US [patent_app_date] => 2005-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 3897 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/217/07217604.pdf [firstpage_image] =>[orig_patent_app_number] => 10906014 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6996874 [patent_doc_number] => 20050136652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-23 [patent_title] => 'Semiconductor interconnection structure with TaN and method of forming the same' [patent_app_type] => utility [patent_app_number] => 11/046624 [patent_app_country] => US [patent_app_date] => 2005-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2608 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0136/20050136652.pdf [firstpage_image] =>[orig_patent_app_number] => 11046624 [rel_patent_id] =>[rel_patent_doc_number] =>)