
Tanya Theresa Ngo Motsinger
Examiner (ID: 10491, Phone: (571)270-7488 , Office: P/2637 )
| Most Active Art Unit | 2637 |
| Art Unit(s) | 2635, 2613, 2637 |
| Total Applications | 469 |
| Issued Applications | 358 |
| Pending Applications | 25 |
| Abandoned Applications | 99 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 931078
[patent_doc_number] => 06979582
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-12-27
[patent_title] => 'Vertical-cavity surface emitting laser diode and method for producing the same'
[patent_app_type] => utility
[patent_app_number] => 10/668553
[patent_app_country] => US
[patent_app_date] => 2003-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/979/06979582.pdf
[firstpage_image] =>[orig_patent_app_number] => 10668553
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/668553 | Vertical-cavity surface emitting laser diode and method for producing the same | Sep 21, 2003 | Issued |
Array
(
[id] => 941239
[patent_doc_number] => 06969630
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[patent_kind] => B2
[patent_issue_date] => 2005-11-29
[patent_title] => 'Method of making an integrated electromechanical switch and tunable capacitor'
[patent_app_type] => utility
[patent_app_number] => 10/663983
[patent_app_country] => US
[patent_app_date] => 2003-09-17
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 10663983
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Array
(
[id] => 7127490
[patent_doc_number] => 20050059234
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-17
[patent_title] => 'Method of fabricating a dual damascene interconnect structure'
[patent_app_type] => utility
[patent_app_number] => 10/663304
[patent_app_country] => US
[patent_app_date] => 2003-09-16
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[patent_drawing_sheets_cnt] => 11
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/663304 | Method of fabricating a dual damascene interconnect structure | Sep 15, 2003 | Abandoned |
Array
(
[id] => 7368889
[patent_doc_number] => 20040026775
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-02-12
[patent_title] => 'Method for protecting electronic or micromechanical components'
[patent_app_type] => new
[patent_app_number] => 10/399253
[patent_app_country] => US
[patent_app_date] => 2003-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[firstpage_image] =>[orig_patent_app_number] => 10399253
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/399253 | Method for protecting electronic or micromechanical components | Sep 8, 2003 | Abandoned |
Array
(
[id] => 7050864
[patent_doc_number] => 20050186751
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[patent_kind] => A1
[patent_issue_date] => 2005-08-25
[patent_title] => 'Method and structure for controlling surface properties of dielectric layers in a thin film component for improved trimming'
[patent_app_type] => utility
[patent_app_number] => 10/653777
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[firstpage_image] =>[orig_patent_app_number] => 10653777
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/653777 | Method and structure for controlling surface properties of dielectric layers in a thin film component for improved trimming | Sep 1, 2003 | Issued |
Array
(
[id] => 7324218
[patent_doc_number] => 20040137698
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[patent_issue_date] => 2004-07-15
[patent_title] => 'Fabrication system and method for monocrystaline semiconductor on a substrate'
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[patent_app_number] => 10/652774
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/652774 | Fabrication system and method for monocrystaline semiconductor on a substrate | Aug 28, 2003 | Abandoned |
Array
(
[id] => 1089056
[patent_doc_number] => 06828176
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[patent_issue_date] => 2004-12-07
[patent_title] => 'Thyristor having a first emitter with relatively lightly doped portion to the base'
[patent_app_type] => B1
[patent_app_number] => 10/650334
[patent_app_country] => US
[patent_app_date] => 2003-08-28
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/828/06828176.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/650334 | Thyristor having a first emitter with relatively lightly doped portion to the base | Aug 27, 2003 | Issued |
Array
(
[id] => 961101
[patent_doc_number] => 06951814
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-10-04
[patent_title] => 'Methods for forming a metal wiring layer on an integrated circuit device at reduced temperatures'
[patent_app_type] => utility
[patent_app_number] => 10/649154
[patent_app_country] => US
[patent_app_date] => 2003-08-27
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[patent_drawing_sheets_cnt] => 6
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/649154 | Methods for forming a metal wiring layer on an integrated circuit device at reduced temperatures | Aug 26, 2003 | Issued |
Array
(
[id] => 982292
[patent_doc_number] => 06927136
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[patent_issue_date] => 2005-08-09
[patent_title] => 'Non-volatile memory cell having metal nano-particles for trapping charges and fabrication thereof'
[patent_app_type] => utility
[patent_app_number] => 10/604884
[patent_app_country] => US
[patent_app_date] => 2003-08-25
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[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/06/927/06927136.pdf
[firstpage_image] =>[orig_patent_app_number] => 10604884
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/604884 | Non-volatile memory cell having metal nano-particles for trapping charges and fabrication thereof | Aug 24, 2003 | Issued |
Array
(
[id] => 7135072
[patent_doc_number] => 20040043536
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-03-04
[patent_title] => 'Method of producing integrated circuit package units'
[patent_app_type] => new
[patent_app_number] => 10/646154
[patent_app_country] => US
[patent_app_date] => 2003-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/646154 | Method of producing integrated circuit package units | Aug 21, 2003 | Abandoned |
Array
(
[id] => 790523
[patent_doc_number] => 06984543
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-01-10
[patent_title] => 'Method of producing laminated PTC thermistor'
[patent_app_type] => utility
[patent_app_number] => 10/639483
[patent_app_country] => US
[patent_app_date] => 2003-08-13
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/639483 | Method of producing laminated PTC thermistor | Aug 12, 2003 | Issued |
Array
(
[id] => 1082650
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[patent_issue_date] => 2004-12-21
[patent_title] => 'Low temperature germanium transfer'
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[patent_app_number] => 10/640783
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/640783 | Low temperature germanium transfer | Aug 12, 2003 | Issued |
Array
(
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[patent_title] => 'Systems and methods for forming dense n-channel and p-channel fins using shadow implanting'
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Array
(
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[patent_title] => 'Method and apparatus for adjusting the thickness of a layer of semiconductor material'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/637094 | Method and apparatus for adjusting the thickness of a layer of semiconductor material | Aug 5, 2003 | Abandoned |
Array
(
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Array
(
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[patent_title] => 'Integrated circuitry, methods of fabricating integrated circuitry, methods of forming local interconnects, and methods of forming conductive lines'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/630433 | Method of forming a local interconnect | Jul 28, 2003 | Issued |
Array
(
[id] => 7359960
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Array
(
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/621292 | Method for fabricating semiconductor device using a nickel salicide process | Jul 16, 2003 | Issued |