Tanya Theresa Ngo Motsinger

Array ( [id] => 7204053 [patent_doc_number] => 20040087138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Method for manufacturing buried wiring structure' [patent_app_type] => new [patent_app_number] => 10/619433 [patent_app_country] => US [patent_app_date] => 2003-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3298 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20040087138.pdf [firstpage_image] =>[orig_patent_app_number] => 10619433 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 944306 [patent_doc_number] => 06967360 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-22 [patent_title] => 'Pseudomorphic high electron mobility transistor with Schottky electrode including lanthanum and boron, and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/617793 [patent_app_country] => US [patent_app_date] => 2003-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4604 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/967/06967360.pdf [firstpage_image] =>[orig_patent_app_number] => 10617793 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 740839 [patent_doc_number] => 07029936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-18 [patent_title] => 'Semiconductor laser, device having reduced contact resistance and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/616923 [patent_app_country] => US [patent_app_date] => 2003-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 38 [patent_no_of_words] => 10318 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/029/07029936.pdf [firstpage_image] =>[orig_patent_app_number] => 10616923 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7398926 [patent_doc_number] => 20040018706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-29 [patent_title] => 'Method for forming a thermal conducting trench in a semiconductor structure' [patent_app_type] => new [patent_app_number] => 10/616854 [patent_app_country] => US [patent_app_date] => 2003-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4743 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20040018706.pdf [firstpage_image] =>[orig_patent_app_number] => 10616854 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7238851 [patent_doc_number] => 20040257194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'Methods for making microwave circuits' [patent_app_type] => new [patent_app_number] => 10/600143 [patent_app_country] => US [patent_app_date] => 2003-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4958 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20040257194.pdf [firstpage_image] =>[orig_patent_app_number] => 10600143 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7328874 [patent_doc_number] => 20040253773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'SOI shaped structure' [patent_app_type] => new [patent_app_number] => 10/463023 [patent_app_country] => US [patent_app_date] => 2003-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2871 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20040253773.pdf [firstpage_image] =>[orig_patent_app_number] => 10463023 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 991084 [patent_doc_number] => 06919611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-19 [patent_title] => 'Semiconductor memory reducing current consumption and narrow channel effect and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/460411 [patent_app_country] => US [patent_app_date] => 2003-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 3882 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/919/06919611.pdf [firstpage_image] =>[orig_patent_app_number] => 10460411 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1009339 [patent_doc_number] => 06900101 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-31 [patent_title] => 'LDMOS transistors and methods for making the same' [patent_app_type] => utility [patent_app_number] => 10/461214 [patent_app_country] => US [patent_app_date] => 2003-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 5917 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/900/06900101.pdf [firstpage_image] =>[orig_patent_app_number] => 10461214 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6611221 [patent_doc_number] => 20030209747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-13 [patent_title] => 'Dielectric element and method for fabricating the same' [patent_app_type] => new [patent_app_number] => 10/458199 [patent_app_country] => US [patent_app_date] => 2003-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8983 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20030209747.pdf [firstpage_image] =>[orig_patent_app_number] => 10458199 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6636427 [patent_doc_number] => 20030211718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-13 [patent_title] => 'MIS field effect transistor and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/457474 [patent_app_country] => US [patent_app_date] => 2003-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12675 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0211/20030211718.pdf [firstpage_image] =>[orig_patent_app_number] => 10457474 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7349207 [patent_doc_number] => 20040248400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-09 [patent_title] => 'Composite low-k dielectric structure' [patent_app_type] => new [patent_app_number] => 10/457217 [patent_app_country] => US [patent_app_date] => 2003-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5054 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0248/20040248400.pdf [firstpage_image] =>[orig_patent_app_number] => 10457217 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7433381 [patent_doc_number] => 20040065882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-08 [patent_title] => 'Semiconductor device and process for production thereof' [patent_app_type] => new [patent_app_number] => 10/453034 [patent_app_country] => US [patent_app_date] => 2003-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 16805 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0065/20040065882.pdf [firstpage_image] =>[orig_patent_app_number] => 10453034 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7222159 [patent_doc_number] => 20040072447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-15 [patent_title] => 'Method and device for minimizing multi-layer microscopic and macroscopic alignment errors' [patent_app_type] => new [patent_app_number] => 10/453858 [patent_app_country] => US [patent_app_date] => 2003-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7082 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20040072447.pdf [firstpage_image] =>[orig_patent_app_number] => 10453858 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1175628 [patent_doc_number] => 06743471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-01 [patent_title] => 'Process for preparing insulating material having low dielectric constant' [patent_app_type] => B2 [patent_app_number] => 10/447039 [patent_app_country] => US [patent_app_date] => 2003-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5384 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/743/06743471.pdf [firstpage_image] =>[orig_patent_app_number] => 10447039 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1046758 [patent_doc_number] => 06864152 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-08 [patent_title] => 'Fabrication of trenches with multiple depths on the same substrate' [patent_app_type] => utility [patent_app_number] => 10/442533 [patent_app_country] => US [patent_app_date] => 2003-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 19 [patent_no_of_words] => 6262 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/864/06864152.pdf [firstpage_image] =>[orig_patent_app_number] => 10442533 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6802840 [patent_doc_number] => 20030230234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-18 [patent_title] => 'Method of forming fine patterns of semiconductor device' [patent_app_type] => new [patent_app_number] => 10/440104 [patent_app_country] => US [patent_app_date] => 2003-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3282 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20030230234.pdf [firstpage_image] =>[orig_patent_app_number] => 10440104 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7604974 [patent_doc_number] => 07115956 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-03 [patent_title] => 'Conductive film as the connector for thin film display device' [patent_app_type] => utility [patent_app_number] => 10/430443 [patent_app_country] => US [patent_app_date] => 2003-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 34 [patent_no_of_words] => 13945 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/115/07115956.pdf [firstpage_image] =>[orig_patent_app_number] => 10430443 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1123454 [patent_doc_number] => 06794288 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-21 [patent_title] => 'Method for electroless deposition of phosphorus-containing metal films onto copper with palladium-free activation' [patent_app_type] => B1 [patent_app_number] => 10/345134 [patent_app_country] => US [patent_app_date] => 2003-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 6611 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/794/06794288.pdf [firstpage_image] =>[orig_patent_app_number] => 10345134 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7408851 [patent_doc_number] => 20040106261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-03 [patent_title] => 'Method of forming an electrode with adjusted work function' [patent_app_type] => new [patent_app_number] => 10/430703 [patent_app_country] => US [patent_app_date] => 2003-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6833 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20040106261.pdf [firstpage_image] =>[orig_patent_app_number] => 10430703 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1062753 [patent_doc_number] => 06849497 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-01 [patent_title] => 'Method of fabricating a semiconductor integrated circuit including a capacitor formed on a single insulating substrate layer having lower boron dose in the vicinity of the surface thereof' [patent_app_type] => utility [patent_app_number] => 10/425593 [patent_app_country] => US [patent_app_date] => 2003-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 18 [patent_no_of_words] => 4074 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/849/06849497.pdf [firstpage_image] =>[orig_patent_app_number] => 10425593 [rel_patent_id] =>[rel_patent_doc_number] =>)