Tanya Theresa Ngo Motsinger

Array ( [id] => 5968485 [patent_doc_number] => 20020090764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-11 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 09/988593 [patent_app_country] => US [patent_app_date] => 2001-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 13598 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20020090764.pdf [firstpage_image] =>[orig_patent_app_number] => 09988593 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1424707 [patent_doc_number] => 06503848 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'Method of forming a smooth polysilicon surface using a soft etch to enlarge the photo lithography window' [patent_app_type] => B1 [patent_app_number] => 09/989804 [patent_app_country] => US [patent_app_date] => 2001-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2009 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/503/06503848.pdf [firstpage_image] =>[orig_patent_app_number] => 09989804 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1102789 [patent_doc_number] => 06815818 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-09 [patent_title] => 'Electrode structure for use in an integrated circuit' [patent_app_type] => B2 [patent_app_number] => 09/988984 [patent_app_country] => US [patent_app_date] => 2001-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 5639 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/815/06815818.pdf [firstpage_image] =>[orig_patent_app_number] => 09988984 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1330326 [patent_doc_number] => 06600177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-29 [patent_title] => 'Boron-carbide and boron rich rhombohedral based transistors and tunnel diodes' [patent_app_type] => B2 [patent_app_number] => 09/991768 [patent_app_country] => US [patent_app_date] => 2001-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4654 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/600/06600177.pdf [firstpage_image] =>[orig_patent_app_number] => 09991768 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6572022 [patent_doc_number] => 20020084521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-04 [patent_title] => 'Flip-chip on film assembly for ball grid array packages' [patent_app_type] => new [patent_app_number] => 09/992387 [patent_app_country] => US [patent_app_date] => 2001-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4308 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20020084521.pdf [firstpage_image] =>[orig_patent_app_number] => 09992387 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1241188 [patent_doc_number] => 06683011 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-27 [patent_title] => 'Process for forming hafnium oxide films' [patent_app_type] => B2 [patent_app_number] => 09/992173 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1186 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/683/06683011.pdf [firstpage_image] =>[orig_patent_app_number] => 09992173 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1466987 [patent_doc_number] => 06458660 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-01 [patent_title] => 'Method of flash cell formation' [patent_app_type] => B1 [patent_app_number] => 09/986933 [patent_app_country] => US [patent_app_date] => 2001-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 1638 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/458/06458660.pdf [firstpage_image] =>[orig_patent_app_number] => 09986933 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1396019 [patent_doc_number] => 06548876 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-15 [patent_title] => 'Semiconductor device of sub-micron or high voltage CMOS structure and method for manufacturing the same' [patent_app_type] => B2 [patent_app_number] => 09/987073 [patent_app_country] => US [patent_app_date] => 2001-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 2880 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/548/06548876.pdf [firstpage_image] =>[orig_patent_app_number] => 09987073 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1241152 [patent_doc_number] => 06682975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-27 [patent_title] => 'Semiconductor memory device having self-aligned contact and fabricating method thereof' [patent_app_type] => B2 [patent_app_number] => 10/001535 [patent_app_country] => US [patent_app_date] => 2001-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 5005 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/682/06682975.pdf [firstpage_image] =>[orig_patent_app_number] => 10001535 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6130047 [patent_doc_number] => 20020076869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'Gate insulation film having a slanted nitrogen concentration profile' [patent_app_type] => new [patent_app_number] => 09/993833 [patent_app_country] => US [patent_app_date] => 2001-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5495 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20020076869.pdf [firstpage_image] =>[orig_patent_app_number] => 09993833 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7645690 [patent_doc_number] => 06472279 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-29 [patent_title] => 'Method of manufacturing a channel stop implant in a semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/993414 [patent_app_country] => US [patent_app_date] => 2001-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3980 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 9 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/472/06472279.pdf [firstpage_image] =>[orig_patent_app_number] => 09993414 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1381392 [patent_doc_number] => 06551862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-22 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => B2 [patent_app_number] => 09/978724 [patent_app_country] => US [patent_app_date] => 2001-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 12167 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/551/06551862.pdf [firstpage_image] =>[orig_patent_app_number] => 09978724 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 782320 [patent_doc_number] => 06991684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-31 [patent_title] => 'Heat-treating apparatus and heat-treating method' [patent_app_type] => utility [patent_app_number] => 10/381724 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 5717 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/991/06991684.pdf [firstpage_image] =>[orig_patent_app_number] => 10381724 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1180096 [patent_doc_number] => 06740587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-25 [patent_title] => 'Semiconductor device having a metal silicide layer and method for manufacturing the same' [patent_app_type] => B2 [patent_app_number] => 09/949853 [patent_app_country] => US [patent_app_date] => 2001-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 6345 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/740/06740587.pdf [firstpage_image] =>[orig_patent_app_number] => 09949853 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6290434 [patent_doc_number] => 20020055231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-09 [patent_title] => 'Semiconductor structure having more usable substrate area and method for forming same' [patent_app_type] => new [patent_app_number] => 09/948496 [patent_app_country] => US [patent_app_date] => 2001-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3134 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20020055231.pdf [firstpage_image] =>[orig_patent_app_number] => 09948496 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1324057 [patent_doc_number] => 06602746 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-05 [patent_title] => 'Dual-gate CMOS semiconductor device manufacturing method' [patent_app_type] => B2 [patent_app_number] => 09/942640 [patent_app_country] => US [patent_app_date] => 2001-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 30 [patent_no_of_words] => 6857 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/602/06602746.pdf [firstpage_image] =>[orig_patent_app_number] => 09942640 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1312242 [patent_doc_number] => 06610587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-26 [patent_title] => 'Method of forming a local interconnect' [patent_app_type] => B2 [patent_app_number] => 09/944894 [patent_app_country] => US [patent_app_date] => 2001-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 3177 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/610/06610587.pdf [firstpage_image] =>[orig_patent_app_number] => 09944894 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1352009 [patent_doc_number] => 06580137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-17 [patent_title] => 'Damascene double gated transistors and related manufacturing methods' [patent_app_type] => B2 [patent_app_number] => 09/942533 [patent_app_country] => US [patent_app_date] => 2001-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 69 [patent_no_of_words] => 7994 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/580/06580137.pdf [firstpage_image] =>[orig_patent_app_number] => 09942533 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6476342 [patent_doc_number] => 20020024103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-28 [patent_title] => ' Structure of borderless contact and fabricating method thereof' [patent_app_type] => new [patent_app_number] => 09/939594 [patent_app_country] => US [patent_app_date] => 2001-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2728 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20020024103.pdf [firstpage_image] =>[orig_patent_app_number] => 09939594 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5997125 [patent_doc_number] => 20020027255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-07 [patent_title] => 'Semiconductor device and method for producing the same' [patent_app_type] => new [patent_app_number] => 09/917954 [patent_app_country] => US [patent_app_date] => 2001-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 15384 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20020027255.pdf [firstpage_image] =>[orig_patent_app_number] => 09917954 [rel_patent_id] =>[rel_patent_doc_number] =>)