
Tanya Theresa Ngo Motsinger
Examiner (ID: 10491, Phone: (571)270-7488 , Office: P/2637 )
| Most Active Art Unit | 2637 |
| Art Unit(s) | 2635, 2613, 2637 |
| Total Applications | 469 |
| Issued Applications | 358 |
| Pending Applications | 25 |
| Abandoned Applications | 99 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1386276
[patent_doc_number] => 06555858
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-04-29
[patent_title] => 'Self-aligned magnetic clad write line and its method of formation'
[patent_app_type] => B1
[patent_app_number] => 09/713734
[patent_app_country] => US
[patent_app_date] => 2000-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 15
[patent_no_of_words] => 5503
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/555/06555858.pdf
[firstpage_image] =>[orig_patent_app_number] => 09713734
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/713734 | Self-aligned magnetic clad write line and its method of formation | Nov 14, 2000 | Issued |
Array
(
[id] => 1326997
[patent_doc_number] => 06599789
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-07-29
[patent_title] => 'Method of forming a field effect transistor'
[patent_app_type] => B1
[patent_app_number] => 09/713844
[patent_app_country] => US
[patent_app_date] => 2000-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 15
[patent_no_of_words] => 3268
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/599/06599789.pdf
[firstpage_image] =>[orig_patent_app_number] => 09713844
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/713844 | Method of forming a field effect transistor | Nov 14, 2000 | Issued |
Array
(
[id] => 1577984
[patent_doc_number] => 06448109
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-09-10
[patent_title] => 'Wafer level method of capping multiple MEMS elements'
[patent_app_type] => B1
[patent_app_number] => 09/713693
[patent_app_country] => US
[patent_app_date] => 2000-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 9
[patent_no_of_words] => 2537
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/448/06448109.pdf
[firstpage_image] =>[orig_patent_app_number] => 09713693
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/713693 | Wafer level method of capping multiple MEMS elements | Nov 14, 2000 | Issued |
Array
(
[id] => 1416789
[patent_doc_number] => 06509263
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-01-21
[patent_title] => 'Method for fabricating a semiconductor memory device having polysilicon with an enhanced surface concentration and reduced contact resistance'
[patent_app_type] => B1
[patent_app_number] => 09/710953
[patent_app_country] => US
[patent_app_date] => 2000-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 26
[patent_no_of_words] => 3458
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/509/06509263.pdf
[firstpage_image] =>[orig_patent_app_number] => 09710953
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/710953 | Method for fabricating a semiconductor memory device having polysilicon with an enhanced surface concentration and reduced contact resistance | Nov 13, 2000 | Issued |
Array
(
[id] => 1532477
[patent_doc_number] => 06410390
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-06-25
[patent_title] => 'Nonvolatile memory device and method for fabricating the same'
[patent_app_type] => B1
[patent_app_number] => 09/710954
[patent_app_country] => US
[patent_app_date] => 2000-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 37
[patent_no_of_words] => 5128
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 246
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/410/06410390.pdf
[firstpage_image] =>[orig_patent_app_number] => 09710954
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/710954 | Nonvolatile memory device and method for fabricating the same | Nov 13, 2000 | Issued |
Array
(
[id] => 1559613
[patent_doc_number] => 06436736
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-08-20
[patent_title] => 'Method for manufacturing a semiconductor package on a leadframe'
[patent_app_type] => B1
[patent_app_number] => 09/710623
[patent_app_country] => US
[patent_app_date] => 2000-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 11
[patent_no_of_words] => 1076
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/436/06436736.pdf
[firstpage_image] =>[orig_patent_app_number] => 09710623
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/710623 | Method for manufacturing a semiconductor package on a leadframe | Nov 12, 2000 | Issued |
Array
(
[id] => 7636576
[patent_doc_number] => 06380079
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-04-30
[patent_title] => 'Metal wiring in semiconductor device and method for fabricating the same'
[patent_app_type] => B1
[patent_app_number] => 09/709624
[patent_app_country] => US
[patent_app_date] => 2000-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 2317
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 9
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/380/06380079.pdf
[firstpage_image] =>[orig_patent_app_number] => 09709624
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/709624 | Metal wiring in semiconductor device and method for fabricating the same | Nov 12, 2000 | Issued |
Array
(
[id] => 1336509
[patent_doc_number] => 06597027
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-07-22
[patent_title] => 'Dielectric element and method for fabricating the same'
[patent_app_type] => B1
[patent_app_number] => 09/709423
[patent_app_country] => US
[patent_app_date] => 2000-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 13
[patent_no_of_words] => 8783
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/597/06597027.pdf
[firstpage_image] =>[orig_patent_app_number] => 09709423
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/709423 | Dielectric element and method for fabricating the same | Nov 12, 2000 | Issued |
Array
(
[id] => 1509259
[patent_doc_number] => 06441413
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-08-27
[patent_title] => 'Semiconductor device having thin film resistors made of bolometer materials'
[patent_app_type] => B1
[patent_app_number] => 09/711481
[patent_app_country] => US
[patent_app_date] => 2000-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 26
[patent_no_of_words] => 7582
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/441/06441413.pdf
[firstpage_image] =>[orig_patent_app_number] => 09711481
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/711481 | Semiconductor device having thin film resistors made of bolometer materials | Nov 12, 2000 | Issued |
Array
(
[id] => 542184
[patent_doc_number] => 07166502
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2007-01-23
[patent_title] => 'Method of manufacturing a thin film transistor'
[patent_app_type] => utility
[patent_app_number] => 09/709483
[patent_app_country] => US
[patent_app_date] => 2000-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 14
[patent_no_of_words] => 3382
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/166/07166502.pdf
[firstpage_image] =>[orig_patent_app_number] => 09709483
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/709483 | Method of manufacturing a thin film transistor | Nov 12, 2000 | Issued |
Array
(
[id] => 1578324
[patent_doc_number] => 06448183
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-09-10
[patent_title] => 'Method of forming contact portion of semiconductor element'
[patent_app_type] => B1
[patent_app_number] => 09/710763
[patent_app_country] => US
[patent_app_date] => 2000-11-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 15
[patent_no_of_words] => 2660
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/448/06448183.pdf
[firstpage_image] =>[orig_patent_app_number] => 09710763
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/710763 | Method of forming contact portion of semiconductor element | Nov 10, 2000 | Issued |
Array
(
[id] => 1468614
[patent_doc_number] => 06459151
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-01
[patent_title] => 'Structure and process of via chain for misalignment test'
[patent_app_type] => B1
[patent_app_number] => 09/710624
[patent_app_country] => US
[patent_app_date] => 2000-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 1441
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/459/06459151.pdf
[firstpage_image] =>[orig_patent_app_number] => 09710624
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/710624 | Structure and process of via chain for misalignment test | Nov 9, 2000 | Issued |
Array
(
[id] => 1073703
[patent_doc_number] => 06838368
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-01-04
[patent_title] => 'Method for making semiconductor device using a nickel film for stopping etching'
[patent_app_type] => utility
[patent_app_number] => 09/710314
[patent_app_country] => US
[patent_app_date] => 2000-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 30
[patent_no_of_words] => 6083
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/838/06838368.pdf
[firstpage_image] =>[orig_patent_app_number] => 09710314
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/710314 | Method for making semiconductor device using a nickel film for stopping etching | Nov 9, 2000 | Issued |
Array
(
[id] => 1417152
[patent_doc_number] => 06528864
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-03-04
[patent_title] => 'Semiconductor wafer having regular or irregular chip pattern and dicing method for the same'
[patent_app_type] => B1
[patent_app_number] => 09/708543
[patent_app_country] => US
[patent_app_date] => 2000-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 15
[patent_no_of_words] => 2993
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/528/06528864.pdf
[firstpage_image] =>[orig_patent_app_number] => 09708543
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/708543 | Semiconductor wafer having regular or irregular chip pattern and dicing method for the same | Nov 8, 2000 | Issued |
Array
(
[id] => 1371523
[patent_doc_number] => 06562680
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-05-13
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => B1
[patent_app_number] => 09/688683
[patent_app_country] => US
[patent_app_date] => 2000-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 27
[patent_no_of_words] => 3639
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 265
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/562/06562680.pdf
[firstpage_image] =>[orig_patent_app_number] => 09688683
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/688683 | Semiconductor device and method of manufacturing the same | Oct 16, 2000 | Issued |
Array
(
[id] => 1402017
[patent_doc_number] => 06534387
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-03-18
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => B1
[patent_app_number] => 09/680613
[patent_app_country] => US
[patent_app_date] => 2000-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 14
[patent_no_of_words] => 4011
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/534/06534387.pdf
[firstpage_image] =>[orig_patent_app_number] => 09680613
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/680613 | Semiconductor device and method of manufacturing the same | Oct 5, 2000 | Issued |
Array
(
[id] => 1494173
[patent_doc_number] => 06342408
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-01-29
[patent_title] => 'Method of manufacturing semiconductor memory device'
[patent_app_type] => B1
[patent_app_number] => 09/658573
[patent_app_country] => US
[patent_app_date] => 2000-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 88
[patent_figures_cnt] => 155
[patent_no_of_words] => 30618
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/342/06342408.pdf
[firstpage_image] =>[orig_patent_app_number] => 09658573
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/658573 | Method of manufacturing semiconductor memory device | Sep 7, 2000 | Issued |
Array
(
[id] => 1435875
[patent_doc_number] => 06355518
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-12
[patent_title] => 'Method for making a DRAM cell with deep-trench capacitors and overlying vertical transistors'
[patent_app_type] => B1
[patent_app_number] => 09/655084
[patent_app_country] => US
[patent_app_date] => 2000-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 12
[patent_no_of_words] => 3664
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/355/06355518.pdf
[firstpage_image] =>[orig_patent_app_number] => 09655084
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/655084 | Method for making a DRAM cell with deep-trench capacitors and overlying vertical transistors | Sep 4, 2000 | Issued |
Array
(
[id] => 1364204
[patent_doc_number] => 06573551
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-06-03
[patent_title] => 'Semiconductor memory device having self-aligned contact and fabricating method thereof'
[patent_app_type] => B1
[patent_app_number] => 09/654664
[patent_app_country] => US
[patent_app_date] => 2000-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 24
[patent_no_of_words] => 5030
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 221
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/573/06573551.pdf
[firstpage_image] =>[orig_patent_app_number] => 09654664
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/654664 | Semiconductor memory device having self-aligned contact and fabricating method thereof | Sep 4, 2000 | Issued |
Array
(
[id] => 1440000
[patent_doc_number] => 06495400
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-12-17
[patent_title] => 'Method of forming low profile semiconductor package'
[patent_app_type] => B1
[patent_app_number] => 09/655034
[patent_app_country] => US
[patent_app_date] => 2000-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 2873
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/495/06495400.pdf
[firstpage_image] =>[orig_patent_app_number] => 09655034
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/655034 | Method of forming low profile semiconductor package | Sep 4, 2000 | Issued |