Search

Tanya Theresa Ngo Motsinger

Examiner (ID: 10491, Phone: (571)270-7488 , Office: P/2637 )

Most Active Art Unit
2637
Art Unit(s)
2635, 2613, 2637
Total Applications
469
Issued Applications
358
Pending Applications
25
Abandoned Applications
99

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1503606 [patent_doc_number] => 06465332 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'Method of making MOS transistor with high doping gradient under the gate' [patent_app_type] => B1 [patent_app_number] => 09/402853 [patent_app_country] => US [patent_app_date] => 2000-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2498 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/465/06465332.pdf [firstpage_image] =>[orig_patent_app_number] => 09402853 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/402853
Method of making MOS transistor with high doping gradient under the gate Jan 9, 2000 Issued
09/451464 FLUORINE DOPED SIO2 FILM AND METHOD OF FABRICATION Nov 29, 1999 Abandoned
Array ( [id] => 1416166 [patent_doc_number] => 06509217 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-21 [patent_title] => 'Inexpensive, reliable, planar RFID tag structure and method for making same' [patent_app_type] => B1 [patent_app_number] => 09/425494 [patent_app_country] => US [patent_app_date] => 1999-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 16708 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 442 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/509/06509217.pdf [firstpage_image] =>[orig_patent_app_number] => 09425494 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/425494
Inexpensive, reliable, planar RFID tag structure and method for making same Oct 21, 1999 Issued
Array ( [id] => 1494926 [patent_doc_number] => 06403442 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Methods of forming capacitors and resultant capacitor structures' [patent_app_type] => B1 [patent_app_number] => 09/389533 [patent_app_country] => US [patent_app_date] => 1999-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3125 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/403/06403442.pdf [firstpage_image] =>[orig_patent_app_number] => 09389533 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/389533
Methods of forming capacitors and resultant capacitor structures Sep 1, 1999 Issued
Array ( [id] => 1297330 [patent_doc_number] => 06627496 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-30 [patent_title] => 'Process for producing structured layers, process for producing components of an integrated circuit, and process for producing a memory configuration' [patent_app_type] => B1 [patent_app_number] => 09/374893 [patent_app_country] => US [patent_app_date] => 1999-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 5101 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/627/06627496.pdf [firstpage_image] =>[orig_patent_app_number] => 09374893 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/374893
Process for producing structured layers, process for producing components of an integrated circuit, and process for producing a memory configuration Aug 12, 1999 Issued
Array ( [id] => 4358919 [patent_doc_number] => 06291861 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Semiconductor device and method for producing the same' [patent_app_type] => 1 [patent_app_number] => 9/345414 [patent_app_country] => US [patent_app_date] => 1999-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 41 [patent_no_of_words] => 15351 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/291/06291861.pdf [firstpage_image] =>[orig_patent_app_number] => 345414 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/345414
Semiconductor device and method for producing the same Jun 29, 1999 Issued
Array ( [id] => 1440162 [patent_doc_number] => 06495478 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Reduction of shrinkage of poly(arylene ether) for low-K IMD' [patent_app_type] => B1 [patent_app_number] => 09/336801 [patent_app_country] => US [patent_app_date] => 1999-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 5605 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/495/06495478.pdf [firstpage_image] =>[orig_patent_app_number] => 09336801 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/336801
Reduction of shrinkage of poly(arylene ether) for low-K IMD Jun 20, 1999 Issued
Array ( [id] => 4366635 [patent_doc_number] => 06274477 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Method of fabricating conductive line structure' [patent_app_type] => 1 [patent_app_number] => 9/336554 [patent_app_country] => US [patent_app_date] => 1999-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 1905 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/274/06274477.pdf [firstpage_image] =>[orig_patent_app_number] => 336554 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/336554
Method of fabricating conductive line structure Jun 18, 1999 Issued
Array ( [id] => 4404252 [patent_doc_number] => 06271051 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Light-emitting diode, light-emitting diode array, and method of their fabrication' [patent_app_type] => 1 [patent_app_number] => 9/329804 [patent_app_country] => US [patent_app_date] => 1999-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4691 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/271/06271051.pdf [firstpage_image] =>[orig_patent_app_number] => 329804 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/329804
Light-emitting diode, light-emitting diode array, and method of their fabrication Jun 9, 1999 Issued
09/317613 CAPACITOR AND METHOD FOR FABRICATING THE SAME May 24, 1999 Abandoned
Array ( [id] => 4354020 [patent_doc_number] => 06218264 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Method of producing a calibration standard for 2-D and 3-D profilometry in the sub-nanometer range' [patent_app_type] => 1 [patent_app_number] => 9/314410 [patent_app_country] => US [patent_app_date] => 1999-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 2744 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/218/06218264.pdf [firstpage_image] =>[orig_patent_app_number] => 314410 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/314410
Method of producing a calibration standard for 2-D and 3-D profilometry in the sub-nanometer range May 18, 1999 Issued
Array ( [id] => 4270654 [patent_doc_number] => 06323060 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Stackable flex circuit IC package and method of making same' [patent_app_type] => 1 [patent_app_number] => 9/305584 [patent_app_country] => US [patent_app_date] => 1999-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 29 [patent_no_of_words] => 6890 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/323/06323060.pdf [firstpage_image] =>[orig_patent_app_number] => 305584 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/305584
Stackable flex circuit IC package and method of making same May 4, 1999 Issued
Array ( [id] => 1588842 [patent_doc_number] => 06482712 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-19 [patent_title] => 'Method for fabricating a bipolar semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/295404 [patent_app_country] => US [patent_app_date] => 1999-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3030 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/482/06482712.pdf [firstpage_image] =>[orig_patent_app_number] => 09295404 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/295404
Method for fabricating a bipolar semiconductor device Apr 20, 1999 Issued
Array ( [id] => 1542696 [patent_doc_number] => 06372621 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Method of forming a bonding pad on a semiconductor chip' [patent_app_type] => B1 [patent_app_number] => 09/293963 [patent_app_country] => US [patent_app_date] => 1999-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 1578 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/372/06372621.pdf [firstpage_image] =>[orig_patent_app_number] => 09293963 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/293963
Method of forming a bonding pad on a semiconductor chip Apr 18, 1999 Issued
09/261709 INTEGRATED CIRCUIT DEVICES WITH HIGH AND LOW VOLTAGE COMPONENTS AND PROCESSES FOR MANUFACTURING THESE DEVICES Mar 2, 1999 Abandoned
Array ( [id] => 4350226 [patent_doc_number] => 06291290 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Thin film capacitor with an improved top electrode and method of forming the same' [patent_app_type] => 1 [patent_app_number] => 9/257254 [patent_app_country] => US [patent_app_date] => 1999-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 15197 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/291/06291290.pdf [firstpage_image] =>[orig_patent_app_number] => 257254 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/257254
Thin film capacitor with an improved top electrode and method of forming the same Feb 24, 1999 Issued
Array ( [id] => 4408902 [patent_doc_number] => 06228734 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Method of manufacturing a capacitance semi-conductor device' [patent_app_type] => 1 [patent_app_number] => 9/229099 [patent_app_country] => US [patent_app_date] => 1999-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2116 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/228/06228734.pdf [firstpage_image] =>[orig_patent_app_number] => 229099 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/229099
Method of manufacturing a capacitance semi-conductor device Jan 11, 1999 Issued
Array ( [id] => 4405610 [patent_doc_number] => 06232200 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Method of reconstructing alignment mark during STI process' [patent_app_type] => 1 [patent_app_number] => 9/227698 [patent_app_country] => US [patent_app_date] => 1999-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 2674 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/232/06232200.pdf [firstpage_image] =>[orig_patent_app_number] => 227698 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/227698
Method of reconstructing alignment mark during STI process Jan 7, 1999 Issued
Array ( [id] => 4410826 [patent_doc_number] => 06232638 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Semiconductor device and manufacturing method for same' [patent_app_type] => 1 [patent_app_number] => 9/199459 [patent_app_country] => US [patent_app_date] => 1998-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 43 [patent_no_of_words] => 7569 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/232/06232638.pdf [firstpage_image] =>[orig_patent_app_number] => 199459 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/199459
Semiconductor device and manufacturing method for same Nov 24, 1998 Issued
Array ( [id] => 4247203 [patent_doc_number] => 06221739 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Method for bonding single crystal membranes to a curved surface' [patent_app_type] => 1 [patent_app_number] => 9/195169 [patent_app_country] => US [patent_app_date] => 1998-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4558 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/221/06221739.pdf [firstpage_image] =>[orig_patent_app_number] => 195169 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/195169
Method for bonding single crystal membranes to a curved surface Nov 16, 1998 Issued
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