Search

Tao Peng

Examiner (ID: 17961, Phone: (571)431-0711 , Office: P/2121 )

Most Active Art Unit
2121
Art Unit(s)
2121, 4141, 2126
Total Applications
12
Issued Applications
1
Pending Applications
0
Abandoned Applications
11

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5686004 [patent_doc_number] => 20060284319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-21 [patent_title] => 'Chip-on-board assemblies' [patent_app_type] => utility [patent_app_number] => 11/452122 [patent_app_country] => US [patent_app_date] => 2006-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5251 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20060284319.pdf [firstpage_image] =>[orig_patent_app_number] => 11452122 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/452122
Chip-on-board assemblies Jun 12, 2006 Abandoned
Array ( [id] => 4968571 [patent_doc_number] => 20070108573 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'Wafer level package having redistribution interconnection layer and method of forming the same' [patent_app_type] => utility [patent_app_number] => 11/448772 [patent_app_country] => US [patent_app_date] => 2006-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3001 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20070108573.pdf [firstpage_image] =>[orig_patent_app_number] => 11448772 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/448772
Wafer level package having redistribution interconnection layer and method of forming the same Jun 7, 2006 Issued
Array ( [id] => 5008135 [patent_doc_number] => 20070278612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-06 [patent_title] => 'Isolation structures for integrated circuits and modular methods of forming the same' [patent_app_type] => utility [patent_app_number] => 11/444102 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 14550 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20070278612.pdf [firstpage_image] =>[orig_patent_app_number] => 11444102 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/444102
Isolation structures for integrated circuits and modular methods of forming the same May 30, 2006 Issued
Array ( [id] => 4510816 [patent_doc_number] => 07915695 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-29 [patent_title] => 'Semiconductor device comprising gate electrode' [patent_app_type] => utility [patent_app_number] => 11/443152 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 12516 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 475 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/915/07915695.pdf [firstpage_image] =>[orig_patent_app_number] => 11443152 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/443152
Semiconductor device comprising gate electrode May 30, 2006 Issued
Array ( [id] => 5697486 [patent_doc_number] => 20060214170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'VERSATILE SYSTEM FOR CHARGE DISSIPATION IN THE FORMATION OF SEMICONDUCTOR DEVICE STRUCTURES' [patent_app_type] => utility [patent_app_number] => 11/420922 [patent_app_country] => US [patent_app_date] => 2006-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3740 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20060214170.pdf [firstpage_image] =>[orig_patent_app_number] => 11420922 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/420922
Versatile system for charge dissipation in the formation of semiconductor device structures May 29, 2006 Issued
Array ( [id] => 4536238 [patent_doc_number] => 07872275 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-18 [patent_title] => 'Light-emitting diode arrangement' [patent_app_type] => utility [patent_app_number] => 11/442672 [patent_app_country] => US [patent_app_date] => 2006-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 3675 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/872/07872275.pdf [firstpage_image] =>[orig_patent_app_number] => 11442672 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/442672
Light-emitting diode arrangement May 25, 2006 Issued
Array ( [id] => 5026276 [patent_doc_number] => 20070267722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-22 [patent_title] => 'Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication' [patent_app_type] => utility [patent_app_number] => 11/436062 [patent_app_country] => US [patent_app_date] => 2006-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 11908 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20070267722.pdf [firstpage_image] =>[orig_patent_app_number] => 11436062 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/436062
Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication May 16, 2006 Abandoned
Array ( [id] => 5703207 [patent_doc_number] => 20060192254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/414372 [patent_app_country] => US [patent_app_date] => 2006-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10019 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20060192254.pdf [firstpage_image] =>[orig_patent_app_number] => 11414372 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/414372
Semiconductor memory device Apr 30, 2006 Issued
Array ( [id] => 4557728 [patent_doc_number] => 07838359 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-23 [patent_title] => 'Technique for forming contact insulation layers and silicide regions with different characteristics' [patent_app_type] => utility [patent_app_number] => 11/379606 [patent_app_country] => US [patent_app_date] => 2006-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 8346 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/838/07838359.pdf [firstpage_image] =>[orig_patent_app_number] => 11379606 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/379606
Technique for forming contact insulation layers and silicide regions with different characteristics Apr 20, 2006 Issued
Array ( [id] => 5659164 [patent_doc_number] => 20060249760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-09 [patent_title] => 'HIGH-VOLTAGE TRANSISTOR OF SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/379206 [patent_app_country] => US [patent_app_date] => 2006-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5581 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20060249760.pdf [firstpage_image] =>[orig_patent_app_number] => 11379206 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/379206
HIGH-VOLTAGE TRANSISTOR OF SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME Apr 17, 2006 Abandoned
Array ( [id] => 285831 [patent_doc_number] => 07550760 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-23 [patent_title] => 'Polyacenes and electronic devices generated therefrom' [patent_app_type] => utility [patent_app_number] => 11/399216 [patent_app_country] => US [patent_app_date] => 2006-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4928 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 8 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/550/07550760.pdf [firstpage_image] =>[orig_patent_app_number] => 11399216 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/399216
Polyacenes and electronic devices generated therefrom Apr 5, 2006 Issued
Array ( [id] => 5208181 [patent_doc_number] => 20070246765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'Semiconductor memory device and method for production' [patent_app_type] => utility [patent_app_number] => 11/394345 [patent_app_country] => US [patent_app_date] => 2006-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4914 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20070246765.pdf [firstpage_image] =>[orig_patent_app_number] => 11394345 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/394345
Semiconductor memory device and method for production Mar 29, 2006 Abandoned
Array ( [id] => 5208203 [patent_doc_number] => 20070246787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'On-plug magnetic tunnel junction devices based on spin torque transfer switching' [patent_app_type] => utility [patent_app_number] => 11/394056 [patent_app_country] => US [patent_app_date] => 2006-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6500 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20070246787.pdf [firstpage_image] =>[orig_patent_app_number] => 11394056 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/394056
On-plug magnetic tunnel junction devices based on spin torque transfer switching Mar 28, 2006 Abandoned
Array ( [id] => 5664663 [patent_doc_number] => 20060170013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'ZnO group epitaxial semiconductor device and its manufacture' [patent_app_type] => utility [patent_app_number] => 11/391135 [patent_app_country] => US [patent_app_date] => 2006-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5564 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20060170013.pdf [firstpage_image] =>[orig_patent_app_number] => 11391135 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/391135
ZnO group epitaxial semiconductor device and its manufacture Mar 27, 2006 Abandoned
Array ( [id] => 5670325 [patent_doc_number] => 20060175679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-10 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/384244 [patent_app_country] => US [patent_app_date] => 2006-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7551 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0175/20060175679.pdf [firstpage_image] =>[orig_patent_app_number] => 11384244 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/384244
Semiconductor device and method for manufacturing the same Mar 20, 2006 Abandoned
Array ( [id] => 5256737 [patent_doc_number] => 20070210369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-13 [patent_title] => 'Single gate-non-volatile flash memory cell' [patent_app_type] => utility [patent_app_number] => 11/375386 [patent_app_country] => US [patent_app_date] => 2006-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3420 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20070210369.pdf [firstpage_image] =>[orig_patent_app_number] => 11375386 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/375386
Single gate-non-volatile flash memory cell Mar 12, 2006 Abandoned
Array ( [id] => 5884210 [patent_doc_number] => 20060273385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-07 [patent_title] => 'Trenched MOSFET device with contact trenches filled with tungsten plugs' [patent_app_type] => utility [patent_app_number] => 11/363824 [patent_app_country] => US [patent_app_date] => 2006-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 4828 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20060273385.pdf [firstpage_image] =>[orig_patent_app_number] => 11363824 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/363824
Trenched MOSFET device with contact trenches filled with tungsten plugs Feb 27, 2006 Abandoned
Array ( [id] => 5002630 [patent_doc_number] => 20070200196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-30 [patent_title] => 'Shallow trench isolation (STI) devices and processes' [patent_app_type] => utility [patent_app_number] => 11/361585 [patent_app_country] => US [patent_app_date] => 2006-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3101 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20070200196.pdf [firstpage_image] =>[orig_patent_app_number] => 11361585 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/361585
Shallow trench isolation (STI) devices and processes Feb 23, 2006 Abandoned
Array ( [id] => 5652806 [patent_doc_number] => 20060138541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Semiconductor device and method of manufacturing same' [patent_app_type] => utility [patent_app_number] => 11/360775 [patent_app_country] => US [patent_app_date] => 2006-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 68 [patent_figures_cnt] => 68 [patent_no_of_words] => 22139 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20060138541.pdf [firstpage_image] =>[orig_patent_app_number] => 11360775 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/360775
Semiconductor device and method of manufacturing same Feb 23, 2006 Abandoned
Array ( [id] => 5049087 [patent_doc_number] => 20070029631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Package Structure and Wafer Level Package Method' [patent_app_type] => utility [patent_app_number] => 11/275256 [patent_app_country] => US [patent_app_date] => 2005-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2716 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20070029631.pdf [firstpage_image] =>[orig_patent_app_number] => 11275256 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/275256
Package Structure and Wafer Level Package Method Dec 20, 2005 Abandoned
Menu