Search

Tao Peng

Examiner (ID: 17961, Phone: (571)431-0711 , Office: P/2121 )

Most Active Art Unit
2121
Art Unit(s)
2121, 4141, 2126
Total Applications
12
Issued Applications
1
Pending Applications
0
Abandoned Applications
11

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5652677 [patent_doc_number] => 20060138412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'CMOS image sensor and fabricating method thereof' [patent_app_type] => utility [patent_app_number] => 11/312355 [patent_app_country] => US [patent_app_date] => 2005-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2421 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20060138412.pdf [firstpage_image] =>[orig_patent_app_number] => 11312355 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/312355
CMOS image sensor and fabricating method thereof Dec 20, 2005 Abandoned
Array ( [id] => 5715714 [patent_doc_number] => 20060079077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-13 [patent_title] => 'Semiconductor device manufacturing method' [patent_app_type] => utility [patent_app_number] => 11/229686 [patent_app_country] => US [patent_app_date] => 2005-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1724 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20060079077.pdf [firstpage_image] =>[orig_patent_app_number] => 11229686 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/229686
Semiconductor device manufacturing method Sep 19, 2005 Abandoned
Array ( [id] => 5154450 [patent_doc_number] => 20070037333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-15 [patent_title] => 'Work function separation for fully silicided gates' [patent_app_type] => utility [patent_app_number] => 11/203716 [patent_app_country] => US [patent_app_date] => 2005-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7737 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20070037333.pdf [firstpage_image] =>[orig_patent_app_number] => 11203716 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/203716
Work function separation for fully silicided gates Aug 14, 2005 Abandoned
Array ( [id] => 5851219 [patent_doc_number] => 20060234410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-19 [patent_title] => 'Method for fabricating organic electroluminescent devices' [patent_app_type] => utility [patent_app_number] => 11/202846 [patent_app_country] => US [patent_app_date] => 2005-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1697 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0234/20060234410.pdf [firstpage_image] =>[orig_patent_app_number] => 11202846 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/202846
Method for fabricating organic electroluminescent devices Aug 11, 2005 Abandoned
Array ( [id] => 856694 [patent_doc_number] => 07374953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-20 [patent_title] => 'Ferroelectric random access memories (FRAMS) having lower electrodes respectively self-aligned to node conductive layer patterns and methods of forming the same' [patent_app_type] => utility [patent_app_number] => 11/202985 [patent_app_country] => US [patent_app_date] => 2005-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 6122 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/374/07374953.pdf [firstpage_image] =>[orig_patent_app_number] => 11202985 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/202985
Ferroelectric random access memories (FRAMS) having lower electrodes respectively self-aligned to node conductive layer patterns and methods of forming the same Aug 11, 2005 Issued
Array ( [id] => 43686 [patent_doc_number] => 07776708 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-08-17 [patent_title] => 'System and method for providing a nitride cap over a polysilicon filled trench to prevent formation of a vertical bird\'s beak structure in the manufacture of a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/201926 [patent_app_country] => US [patent_app_date] => 2005-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 2626 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/776/07776708.pdf [firstpage_image] =>[orig_patent_app_number] => 11201926 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/201926
System and method for providing a nitride cap over a polysilicon filled trench to prevent formation of a vertical bird's beak structure in the manufacture of a semiconductor device Aug 10, 2005 Issued
Array ( [id] => 5049064 [patent_doc_number] => 20070029608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Offset spacers for CMOS transistors' [patent_app_type] => utility [patent_app_number] => 11/199486 [patent_app_country] => US [patent_app_date] => 2005-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3490 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20070029608.pdf [firstpage_image] =>[orig_patent_app_number] => 11199486 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/199486
Offset spacers for CMOS transistors Aug 7, 2005 Abandoned
Array ( [id] => 4514394 [patent_doc_number] => 07910499 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Autofocus for high power laser diode based annealing system' [patent_app_type] => utility [patent_app_number] => 11/198660 [patent_app_country] => US [patent_app_date] => 2005-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 3821 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/910/07910499.pdf [firstpage_image] =>[orig_patent_app_number] => 11198660 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/198660
Autofocus for high power laser diode based annealing system Aug 4, 2005 Issued
Array ( [id] => 5895064 [patent_doc_number] => 20060003603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-05 [patent_title] => 'Method and apparatus for processing' [patent_app_type] => utility [patent_app_number] => 11/165505 [patent_app_country] => US [patent_app_date] => 2005-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9706 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20060003603.pdf [firstpage_image] =>[orig_patent_app_number] => 11165505 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/165505
Method and apparatus for processing Jun 23, 2005 Abandoned
Array ( [id] => 6944875 [patent_doc_number] => 20050196924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => 'Semiconductor device and its manufacture method' [patent_app_type] => utility [patent_app_number] => 11/125398 [patent_app_country] => US [patent_app_date] => 2005-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4049 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20050196924.pdf [firstpage_image] =>[orig_patent_app_number] => 11125398 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/125398
Semiconductor device and its manufacture method May 5, 2005 Abandoned
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