Search

Tara Rose E. Carter

Examiner (ID: 1024, Phone: (571)272-3402 , Office: P/3733 )

Most Active Art Unit
3733
Art Unit(s)
3773, 3733
Total Applications
1164
Issued Applications
872
Pending Applications
92
Abandoned Applications
222

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15714961 [patent_doc_number] => 20200104247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => METHOD AND SYSTEM FOR UNINTERRUPTED AUTOMATED TESTING OF END-USER APPLICATION [patent_app_type] => utility [patent_app_number] => 16/195952 [patent_app_country] => US [patent_app_date] => 2018-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8157 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16195952 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/195952
METHOD AND SYSTEM FOR UNINTERRUPTED AUTOMATED TESTING OF END-USER APPLICATION Nov 19, 2018 Abandoned
Array ( [id] => 15935977 [patent_doc_number] => 20200159622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => RULE BASED FAILURE ADDRESSING [patent_app_type] => utility [patent_app_number] => 16/194542 [patent_app_country] => US [patent_app_date] => 2018-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5002 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16194542 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/194542
RULE BASED FAILURE ADDRESSING Nov 18, 2018 Abandoned
Array ( [id] => 15870767 [patent_doc_number] => 20200142787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => LEVERAGING SERVER SIDE CACHE IN FAILOVER SCENARIO [patent_app_type] => utility [patent_app_number] => 16/181399 [patent_app_country] => US [patent_app_date] => 2018-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14908 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16181399 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/181399
Leveraging server side cache in failover scenario Nov 5, 2018 Issued
Array ( [id] => 16772773 [patent_doc_number] => 10983879 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-04-20 [patent_title] => System and method for managing recovery of multi-controller NVMe drives [patent_app_type] => utility [patent_app_number] => 16/176188 [patent_app_country] => US [patent_app_date] => 2018-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6062 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16176188 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/176188
System and method for managing recovery of multi-controller NVMe drives Oct 30, 2018 Issued
Array ( [id] => 15836941 [patent_doc_number] => 20200133753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => USING A MACHINE LEARNING MODULE TO PERFORM PREEMPTIVE IDENTIFICATION AND REDUCTION OF RISK OF FAILURE IN COMPUTATIONAL SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/172455 [patent_app_country] => US [patent_app_date] => 2018-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6633 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172455 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/172455
Using a machine learning module to perform preemptive identification and reduction of risk of failure in computational systems Oct 25, 2018 Issued
Array ( [id] => 17283113 [patent_doc_number] => 11200142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Perform preemptive identification and reduction of risk of failure in computational systems by training a machine learning module [patent_app_type] => utility [patent_app_number] => 16/172475 [patent_app_country] => US [patent_app_date] => 2018-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8562 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172475 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/172475
Perform preemptive identification and reduction of risk of failure in computational systems by training a machine learning module Oct 25, 2018 Issued
Array ( [id] => 17106269 [patent_doc_number] => 11126486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-21 [patent_title] => Prediction of power shutdown and outage incidents [patent_app_type] => utility [patent_app_number] => 16/171332 [patent_app_country] => US [patent_app_date] => 2018-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5281 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16171332 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/171332
Prediction of power shutdown and outage incidents Oct 24, 2018 Issued
Array ( [id] => 15836945 [patent_doc_number] => 20200133755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => METHOD AND SYSTEM FOR INTELLIGENTLY RESOLVING FAILURES RECURRING IN INFORMATION TECHNOLOGY ENVIRONMENTS [patent_app_type] => utility [patent_app_number] => 16/169973 [patent_app_country] => US [patent_app_date] => 2018-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10951 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16169973 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/169973
Method and system for intelligently resolving failures recurring in information technology environments Oct 23, 2018 Issued
Array ( [id] => 17180100 [patent_doc_number] => 11157342 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-26 [patent_title] => Memory systems and operating methods of memory systems [patent_app_type] => utility [patent_app_number] => 16/164103 [patent_app_country] => US [patent_app_date] => 2018-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 9652 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16164103 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/164103
Memory systems and operating methods of memory systems Oct 17, 2018 Issued
Array ( [id] => 14235203 [patent_doc_number] => 20190129774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => FIRMWARE EVENT TRACKING FOR NAND-BASED STORAGE DEVICES, AND METHODS AND INSTRUCTION SETS FOR PERFORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/163189 [patent_app_country] => US [patent_app_date] => 2018-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7438 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16163189 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/163189
Firmware event tracking for NAND-based storage devices, and methods and instruction sets for performing the same Oct 16, 2018 Issued
Array ( [id] => 17729605 [patent_doc_number] => 11385993 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-12 [patent_title] => Dynamic integration of command line utilities [patent_app_type] => utility [patent_app_number] => 16/151984 [patent_app_country] => US [patent_app_date] => 2018-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 17423 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16151984 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/151984
Dynamic integration of command line utilities Oct 3, 2018 Issued
Array ( [id] => 17589586 [patent_doc_number] => 11327859 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-05-10 [patent_title] => Cell-based storage system with failure isolation [patent_app_type] => utility [patent_app_number] => 16/134837 [patent_app_country] => US [patent_app_date] => 2018-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7914 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16134837 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/134837
Cell-based storage system with failure isolation Sep 17, 2018 Issued
Array ( [id] => 17276591 [patent_doc_number] => 20210382789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => METHOD FOR PROTECTING SYSTEM FROM BEING POWERED OFF DURING UPGRADE AND TERMINAL DEVICE [patent_app_type] => utility [patent_app_number] => 16/324607 [patent_app_country] => US [patent_app_date] => 2018-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3099 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16324607 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/324607
METHOD FOR PROTECTING SYSTEM FROM BEING POWERED OFF DURING UPGRADE AND TERMINAL DEVICE Sep 16, 2018 Abandoned
Array ( [id] => 15349331 [patent_doc_number] => 20200012557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => SOLID STATE STORAGE DEVICE AND DATA PROCESSING METHOD WHEN A POWER FAILURE OCCURS [patent_app_type] => utility [patent_app_number] => 16/118549 [patent_app_country] => US [patent_app_date] => 2018-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5666 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16118549 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/118549
SOLID STATE STORAGE DEVICE AND DATA PROCESSING METHOD WHEN A POWER FAILURE OCCURS Aug 30, 2018 Abandoned
Array ( [id] => 14189061 [patent_doc_number] => 20190114236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => FAULT TOLERANT NETWORK ON-CHIP [patent_app_type] => utility [patent_app_number] => 16/022334 [patent_app_country] => US [patent_app_date] => 2018-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6293 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16022334 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/022334
FAULT TOLERANT NETWORK ON-CHIP Jun 27, 2018 Abandoned
Array ( [id] => 17846740 [patent_doc_number] => 11436113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Method and system for maintaining storage device failure tolerance in a composable infrastructure [patent_app_type] => utility [patent_app_number] => 16/021189 [patent_app_country] => US [patent_app_date] => 2018-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 14511 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16021189 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/021189
Method and system for maintaining storage device failure tolerance in a composable infrastructure Jun 27, 2018 Issued
Array ( [id] => 17454944 [patent_doc_number] => 11269805 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Signal pathways in multi-tile processors [patent_app_type] => utility [patent_app_number] => 15/980579 [patent_app_country] => US [patent_app_date] => 2018-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 14912 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15980579 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/980579
Signal pathways in multi-tile processors May 14, 2018 Issued
Array ( [id] => 17180122 [patent_doc_number] => 11157365 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-26 [patent_title] => Method for processing stripe in storage device and storage device [patent_app_type] => utility [patent_app_number] => 15/956063 [patent_app_country] => US [patent_app_date] => 2018-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 7959 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15956063 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/956063
Method for processing stripe in storage device and storage device Apr 17, 2018 Issued
Array ( [id] => 14872525 [patent_doc_number] => 20190286504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => GRAPH-BASED ROOT CAUSE ANALYSIS [patent_app_type] => utility [patent_app_number] => 15/933263 [patent_app_country] => US [patent_app_date] => 2018-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13018 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15933263 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/933263
GRAPH-BASED ROOT CAUSE ANALYSIS Mar 21, 2018 Abandoned
Array ( [id] => 14872389 [patent_doc_number] => 20190286436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => System and Method for Automated BIOS Recovery After BIOS Corruption [patent_app_type] => utility [patent_app_number] => 15/919444 [patent_app_country] => US [patent_app_date] => 2018-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5010 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15919444 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/919444
System and method for automated BIOS recovery after BIOS corruption Mar 12, 2018 Issued
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