Search

Tarek Chbouki

Examiner (ID: 9109, Phone: (571)270-3154 , Office: P/2165 )

Most Active Art Unit
2165
Art Unit(s)
2169, 2165
Total Applications
935
Issued Applications
710
Pending Applications
60
Abandoned Applications
175

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18927313 [patent_doc_number] => 20240030317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/869205 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8641 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869205 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/869205
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Jul 19, 2022 Pending
Array ( [id] => 18252658 [patent_doc_number] => 20230079697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/868401 [patent_app_country] => US [patent_app_date] => 2022-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10642 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17868401 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/868401
SEMICONDUCTOR DEVICE Jul 18, 2022 Pending
Array ( [id] => 18898638 [patent_doc_number] => 20240014123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => SEMICONDUCTOR DEVICE WITH LEAD-ON-CHIP INTERCONNECT AND METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 17/810882 [patent_app_country] => US [patent_app_date] => 2022-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3950 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17810882 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/810882
SEMICONDUCTOR DEVICE WITH LEAD-ON-CHIP INTERCONNECT AND METHOD THEREFOR Jul 5, 2022 Pending
Array ( [id] => 18898556 [patent_doc_number] => 20240014041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE WITH GATE STACK AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/810697 [patent_app_country] => US [patent_app_date] => 2022-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10434 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17810697 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/810697
SEMICONDUCTOR DEVICE STRUCTURE WITH GATE STACK AND METHOD FOR FORMING THE SAME Jul 4, 2022 Pending
Array ( [id] => 18095039 [patent_doc_number] => 20220413380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => Method for Providing Different Patterns on a Single Substrate [patent_app_type] => utility [patent_app_number] => 17/846366 [patent_app_country] => US [patent_app_date] => 2022-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4396 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17846366 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/846366
Method for Providing Different Patterns on a Single Substrate Jun 21, 2022 Pending
Array ( [id] => 20347538 [patent_doc_number] => 12471276 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Semiconductor storage device and method of manufacturing semiconductor storage device [patent_app_type] => utility [patent_app_number] => 17/806545 [patent_app_country] => US [patent_app_date] => 2022-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 34 [patent_no_of_words] => 8130 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 549 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806545 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/806545
Semiconductor storage device and method of manufacturing semiconductor storage device Jun 12, 2022 Issued
Array ( [id] => 18680164 [patent_doc_number] => 20230317822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => GATE SPACERS WITH ADJACENT UNIFORM EPITAXIAL MATERIAL [patent_app_type] => utility [patent_app_number] => 17/711434 [patent_app_country] => US [patent_app_date] => 2022-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7266 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17711434 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/711434
GATE SPACERS WITH ADJACENT UNIFORM EPITAXIAL MATERIAL Mar 31, 2022 Pending
Array ( [id] => 17780533 [patent_doc_number] => 20220246883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => FLEXIBLE DISPLAY PANEL, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/588306 [patent_app_country] => US [patent_app_date] => 2022-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10211 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17588306 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/588306
FLEXIBLE DISPLAY PANEL, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE Jan 29, 2022 Pending
Array ( [id] => 18821246 [patent_doc_number] => 20230395587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => Method for Manufacturing Die [patent_app_type] => utility [patent_app_number] => 18/248734 [patent_app_country] => US [patent_app_date] => 2022-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11738 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18248734 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/248734
Method for Manufacturing Die Jan 24, 2022 Pending
Array ( [id] => 18473181 [patent_doc_number] => 20230207469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => Memory Arrays Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells [patent_app_type] => utility [patent_app_number] => 17/582280 [patent_app_country] => US [patent_app_date] => 2022-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7986 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17582280 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/582280
Memory Arrays Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells Jan 23, 2022 Pending
Array ( [id] => 18475536 [patent_doc_number] => 20230209824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => Integrated Circuitry, Memory Circuitry Comprising Strings Of Memory Cells, And Method Of Forming Integrated Circuitry [patent_app_type] => utility [patent_app_number] => 17/575939 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7213 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17575939 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/575939
Integrated circuitry, memory circuitry comprising strings of memory cells, and method of forming integrated circuitry Jan 13, 2022 Issued
Array ( [id] => 17986384 [patent_doc_number] => 20220352421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/571296 [patent_app_country] => US [patent_app_date] => 2022-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12902 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17571296 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/571296
DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME Jan 6, 2022 Pending
Array ( [id] => 18486054 [patent_doc_number] => 20230213394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => VERTICAL LIGHT-EMITTING DIODE CHIP STRUCTURE CAPABLE OF MEASURING TEMPERATURE AND TEMPERATURE MEASUREMENT CALIBRATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/568080 [patent_app_country] => US [patent_app_date] => 2022-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3597 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17568080 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/568080
VERTICAL LIGHT-EMITTING DIODE CHIP STRUCTURE CAPABLE OF MEASURING TEMPERATURE AND TEMPERATURE MEASUREMENT CALIBRATION METHOD THEREOF Jan 3, 2022 Abandoned
Array ( [id] => 18159979 [patent_doc_number] => 20230026571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => THERMAL SENSOR PACKAGE [patent_app_type] => utility [patent_app_number] => 17/567984 [patent_app_country] => US [patent_app_date] => 2022-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6323 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17567984 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/567984
THERMAL SENSOR PACKAGE Jan 3, 2022 Pending
Array ( [id] => 18456435 [patent_doc_number] => 20230197717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING NEIGHBORING FIN-BASED DEVICES [patent_app_type] => utility [patent_app_number] => 17/559916 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17559916 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/559916
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING NEIGHBORING FIN-BASED DEVICES Dec 21, 2021 Pending
Array ( [id] => 17949593 [patent_doc_number] => 20220336612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => TRANSISTOR INCLUDING BOTTOM ISOLATION AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/548179 [patent_app_country] => US [patent_app_date] => 2021-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8886 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17548179 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/548179
TRANSISTOR INCLUDING BOTTOM ISOLATION AND MANUFACTURING METHOD THEREOF Dec 9, 2021 Pending
Array ( [id] => 18882902 [patent_doc_number] => 20240006271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => HEATING ELEMENT COOLING STRUCTURE AND POWER CONVERSION DEVICE [patent_app_type] => utility [patent_app_number] => 18/247490 [patent_app_country] => US [patent_app_date] => 2021-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4286 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18247490 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/247490
HEATING ELEMENT COOLING STRUCTURE AND POWER CONVERSION DEVICE Sep 29, 2021 Pending
Array ( [id] => 18286846 [patent_doc_number] => 20230102318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => GROUP III-NITRIDE SEMICONDUCTOR ARRAY WITH HETEROGENEOUS ELECTRODES FOR RADIO FREQUENCY PROCESSING [patent_app_type] => utility [patent_app_number] => 17/483956 [patent_app_country] => US [patent_app_date] => 2021-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13748 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17483956 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/483956
GROUP III-NITRIDE SEMICONDUCTOR ARRAY WITH HETEROGENEOUS ELECTRODES FOR RADIO FREQUENCY PROCESSING Sep 23, 2021 Abandoned
Array ( [id] => 18266928 [patent_doc_number] => 20230088170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => MICROELECTRONIC ASSEMBLIES INCLUDING SOLDER AND NON-SOLDER INTERCONNECTS [patent_app_type] => utility [patent_app_number] => 17/481068 [patent_app_country] => US [patent_app_date] => 2021-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14298 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17481068 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/481068
MICROELECTRONIC ASSEMBLIES INCLUDING SOLDER AND NON-SOLDER INTERCONNECTS Sep 20, 2021 Pending
Array ( [id] => 18211064 [patent_doc_number] => 20230057326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => SELF-ALIGNED GATE CUT STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/406480 [patent_app_country] => US [patent_app_date] => 2021-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10992 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406480 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/406480
SELF-ALIGNED GATE CUT STRUCTURES Aug 18, 2021 Pending
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