
Tarun Sinha
Examiner (ID: 10769, Phone: (571)270-3993 , Office: P/2856 )
| Most Active Art Unit | 2863 |
| Art Unit(s) | 2863, 2861, 2855, 2856 |
| Total Applications | 732 |
| Issued Applications | 531 |
| Pending Applications | 72 |
| Abandoned Applications | 142 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8568668
[patent_doc_number] => 20120331239
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-27
[patent_title] => 'SHARED MEMORY ARCHITECTURE'
[patent_app_type] => utility
[patent_app_number] => 13/604429
[patent_app_country] => US
[patent_app_date] => 2012-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 9493
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13604429
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/604429 | Shared memory architecture | Sep 4, 2012 | Issued |
Array
(
[id] => 10293186
[patent_doc_number] => 20150178185
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-06-25
[patent_title] => 'Technique for Controlling Memory Accesses'
[patent_app_type] => utility
[patent_app_number] => 14/419942
[patent_app_country] => US
[patent_app_date] => 2012-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6759
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14419942
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/419942 | Technique for controlling memory accesses | Aug 5, 2012 | Issued |
Array
(
[id] => 8952657
[patent_doc_number] => 20130198438
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-01
[patent_title] => 'DATA STORAGE APPARATUS AND METHOD FOR COMPACTION PROCESSING'
[patent_app_type] => utility
[patent_app_number] => 13/560486
[patent_app_country] => US
[patent_app_date] => 2012-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7212
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13560486
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/560486 | Data storage apparatus and method for compaction processing | Jul 26, 2012 | Issued |
Array
(
[id] => 10543804
[patent_doc_number] => 09268936
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-02-23
[patent_title] => 'Physical memory forensics system and method'
[patent_app_type] => utility
[patent_app_number] => 13/560415
[patent_app_country] => US
[patent_app_date] => 2012-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4230
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13560415
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/560415 | Physical memory forensics system and method | Jul 26, 2012 | Issued |
Array
(
[id] => 9282863
[patent_doc_number] => 20140032831
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-30
[patent_title] => 'MULTI-UPDATABLE LEAST RECENTLY USED MECHANISM'
[patent_app_type] => utility
[patent_app_number] => 13/560473
[patent_app_country] => US
[patent_app_date] => 2012-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5094
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13560473
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/560473 | Multi-updatable least recently used mechanism | Jul 26, 2012 | Issued |
Array
(
[id] => 8485059
[patent_doc_number] => 20120284466
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-11-08
[patent_title] => 'METHODS FOR CONTROLLING HOST MEMORY ACCESS WITH MEMORY DEVICES AND SYSTEMS'
[patent_app_type] => utility
[patent_app_number] => 13/550671
[patent_app_country] => US
[patent_app_date] => 2012-07-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5470
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13550671
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/550671 | Methods for controlling host memory access with memory devices and systems | Jul 16, 2012 | Issued |
Array
(
[id] => 9193332
[patent_doc_number] => 20130332647
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-12-12
[patent_title] => 'METHOD AND APPARATUS FOR FAULT TOLERANT FOTA UPDATE WITH SINGLE BACKUP BLOCK WRITE'
[patent_app_type] => utility
[patent_app_number] => 13/493383
[patent_app_country] => US
[patent_app_date] => 2012-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3884
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13493383
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/493383 | Method and apparatus for fault tolerant FOTA update with single backup block write | Jun 10, 2012 | Issued |
Array
(
[id] => 9193384
[patent_doc_number] => 20130332699
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-12-12
[patent_title] => 'TARGET BUFFER ADDRESS REGION TRACKING'
[patent_app_type] => utility
[patent_app_number] => 13/492943
[patent_app_country] => US
[patent_app_date] => 2012-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6791
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13492943
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/492943 | Target buffer address region tracking | Jun 10, 2012 | Issued |
Array
(
[id] => 10885476
[patent_doc_number] => 08909879
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-12-09
[patent_title] => 'Counter-based entry invalidation for metadata previous write queue'
[patent_app_type] => utility
[patent_app_number] => 13/493644
[patent_app_country] => US
[patent_app_date] => 2012-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5567
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13493644
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/493644 | Counter-based entry invalidation for metadata previous write queue | Jun 10, 2012 | Issued |
Array
(
[id] => 10879303
[patent_doc_number] => 08904100
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-12-02
[patent_title] => 'Process identifier-based cache data transfer'
[patent_app_type] => utility
[patent_app_number] => 13/493636
[patent_app_country] => US
[patent_app_date] => 2012-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 5432
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13493636
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/493636 | Process identifier-based cache data transfer | Jun 10, 2012 | Issued |
Array
(
[id] => 10867110
[patent_doc_number] => 08892835
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-11-18
[patent_title] => 'Insertion of a virtualization layer into a replication environment'
[patent_app_type] => utility
[patent_app_number] => 13/490752
[patent_app_country] => US
[patent_app_date] => 2012-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2585
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13490752
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/490752 | Insertion of a virtualization layer into a replication environment | Jun 6, 2012 | Issued |
Array
(
[id] => 9707264
[patent_doc_number] => 08832358
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-09
[patent_title] => 'Data writing method, memory controller and memory storage apparatus'
[patent_app_type] => utility
[patent_app_number] => 13/490475
[patent_app_country] => US
[patent_app_date] => 2012-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 16
[patent_no_of_words] => 9420
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 260
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13490475
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/490475 | Data writing method, memory controller and memory storage apparatus | Jun 6, 2012 | Issued |
Array
(
[id] => 9714285
[patent_doc_number] => 08838885
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-16
[patent_title] => 'Solid state drive packages and related methods and systems'
[patent_app_type] => utility
[patent_app_number] => 13/490865
[patent_app_country] => US
[patent_app_date] => 2012-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 31
[patent_no_of_words] => 8623
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13490865
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/490865 | Solid state drive packages and related methods and systems | Jun 6, 2012 | Issued |
Array
(
[id] => 8540471
[patent_doc_number] => 08316198
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-11-20
[patent_title] => 'Data processing system'
[patent_app_type] => utility
[patent_app_number] => 13/472621
[patent_app_country] => US
[patent_app_date] => 2012-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 66
[patent_figures_cnt] => 66
[patent_no_of_words] => 35307
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 247
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13472621
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/472621 | Data processing system | May 15, 2012 | Issued |
Array
(
[id] => 9130172
[patent_doc_number] => 08578128
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-11-05
[patent_title] => 'Virtual block mapping for relocating compressed and/or encrypted file data block blocks'
[patent_app_type] => utility
[patent_app_number] => 13/464337
[patent_app_country] => US
[patent_app_date] => 2012-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 10675
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 286
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13464337
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/464337 | Virtual block mapping for relocating compressed and/or encrypted file data block blocks | May 3, 2012 | Issued |
Array
(
[id] => 8756806
[patent_doc_number] => 20130091111
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-11
[patent_title] => 'Controlling Configurable Variable Data Reduction'
[patent_app_type] => utility
[patent_app_number] => 13/460921
[patent_app_country] => US
[patent_app_date] => 2012-05-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 8272
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13460921
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/460921 | Controlling configurable variable data reduction | Apr 30, 2012 | Issued |
Array
(
[id] => 12966898
[patent_doc_number] => 09875194
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-01-23
[patent_title] => Security system for external data storage apparatus and control method thereof
[patent_app_type] => utility
[patent_app_number] => 13/448101
[patent_app_country] => US
[patent_app_date] => 2012-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4999
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13448101
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/448101 | Security system for external data storage apparatus and control method thereof | Apr 15, 2012 | Issued |
Array
(
[id] => 8325730
[patent_doc_number] => 20120198145
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-08-02
[patent_title] => 'MEMORY ACCESS APPARATUS AND DISPLAY USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/442868
[patent_app_country] => US
[patent_app_date] => 2012-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2980
[patent_no_of_claims] => 42
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13442868
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/442868 | MEMORY ACCESS APPARATUS AND DISPLAY USING THE SAME | Apr 9, 2012 | Abandoned |
Array
(
[id] => 8709873
[patent_doc_number] => 20130067162
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-14
[patent_title] => 'METHODS AND STRUCTURE FOR LOAD BALANCING OF BACKGROUND TASKS BETWEEN STORAGE CONTROLLERS IN A CLUSTERED STORAGE ENVIRONMENT'
[patent_app_type] => utility
[patent_app_number] => 13/432223
[patent_app_country] => US
[patent_app_date] => 2012-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4177
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13432223
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/432223 | Methods and structure for load balancing of background tasks between storage controllers in a clustered storage environment | Mar 27, 2012 | Issued |
Array
(
[id] => 8709883
[patent_doc_number] => 20130067172
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-14
[patent_title] => 'METHODS AND STRUCTURE FOR IMPROVED BUFFER ALLOCATION IN A STORAGE CONTROLLER'
[patent_app_type] => utility
[patent_app_number] => 13/432150
[patent_app_country] => US
[patent_app_date] => 2012-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5313
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13432150
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/432150 | Methods and structure for improved buffer allocation in a storage controller | Mar 27, 2012 | Issued |