Search

Tat Chi Chio

Examiner (ID: 14792, Phone: (571)272-9563 , Office: P/2486 )

Most Active Art Unit
2486
Art Unit(s)
2621, 2481, 2609, 2486, 2112
Total Applications
970
Issued Applications
657
Pending Applications
95
Abandoned Applications
239

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6866372 [patent_doc_number] => 20030191898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-09 [patent_title] => 'Replacement data error detector' [patent_app_type] => new [patent_app_number] => 10/411589 [patent_app_country] => US [patent_app_date] => 2003-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7202 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20030191898.pdf [firstpage_image] =>[orig_patent_app_number] => 10411589 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/411589
Replacement data error detector Apr 9, 2003 Issued
Array ( [id] => 7360712 [patent_doc_number] => 20040049656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-11 [patent_title] => 'Processor and instruction execution method with reduced address information' [patent_app_type] => new [patent_app_number] => 10/395849 [patent_app_country] => US [patent_app_date] => 2003-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9187 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20040049656.pdf [firstpage_image] =>[orig_patent_app_number] => 10395849 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/395849
Processor and instruction execution method with reduced address information Mar 24, 2003 Issued
Array ( [id] => 7246436 [patent_doc_number] => 20040158669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'Architecture for a serial ATA bus based flash memory apparatus' [patent_app_type] => new [patent_app_number] => 10/397092 [patent_app_country] => US [patent_app_date] => 2003-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3722 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20040158669.pdf [firstpage_image] =>[orig_patent_app_number] => 10397092 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/397092
Architecture for a serial ATA bus based flash memory apparatus Mar 23, 2003 Abandoned
Array ( [id] => 947626 [patent_doc_number] => 06965961 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-15 [patent_title] => 'Queue-based spin lock with timeout' [patent_app_type] => utility [patent_app_number] => 10/377024 [patent_app_country] => US [patent_app_date] => 2003-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 9725 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/965/06965961.pdf [firstpage_image] =>[orig_patent_app_number] => 10377024 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/377024
Queue-based spin lock with timeout Mar 2, 2003 Issued
Array ( [id] => 731100 [patent_doc_number] => 07047374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-16 [patent_title] => 'Memory read/write reordering' [patent_app_type] => utility [patent_app_number] => 10/358745 [patent_app_country] => US [patent_app_date] => 2003-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 22352 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/047/07047374.pdf [firstpage_image] =>[orig_patent_app_number] => 10358745 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/358745
Memory read/write reordering Feb 4, 2003 Issued
Array ( [id] => 7391492 [patent_doc_number] => 20040022094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-05 [patent_title] => 'Cache usage for concurrent multiple streams' [patent_app_type] => new [patent_app_number] => 10/358618 [patent_app_country] => US [patent_app_date] => 2003-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 22534 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20040022094.pdf [firstpage_image] =>[orig_patent_app_number] => 10358618 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/358618
Cache usage for concurrent multiple streams Feb 4, 2003 Abandoned
Array ( [id] => 7621223 [patent_doc_number] => 06978278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-20 [patent_title] => 'System and method for heterogeneous caching' [patent_app_type] => utility [patent_app_number] => 10/340067 [patent_app_country] => US [patent_app_date] => 2003-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2384 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/978/06978278.pdf [firstpage_image] =>[orig_patent_app_number] => 10340067 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/340067
System and method for heterogeneous caching Jan 9, 2003 Issued
Array ( [id] => 761530 [patent_doc_number] => 07020684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-28 [patent_title] => 'System and method for optimistic caching' [patent_app_type] => utility [patent_app_number] => 10/340023 [patent_app_country] => US [patent_app_date] => 2003-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2874 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/020/07020684.pdf [firstpage_image] =>[orig_patent_app_number] => 10340023 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/340023
System and method for optimistic caching Jan 9, 2003 Issued
Array ( [id] => 971398 [patent_doc_number] => 06941438 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-06 [patent_title] => 'Memory interleaving' [patent_app_type] => utility [patent_app_number] => 10/340220 [patent_app_country] => US [patent_app_date] => 2003-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4783 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/941/06941438.pdf [firstpage_image] =>[orig_patent_app_number] => 10340220 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/340220
Memory interleaving Jan 9, 2003 Issued
Array ( [id] => 7621157 [patent_doc_number] => 06978344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-20 [patent_title] => 'Shift register control of a circular elasticity buffer' [patent_app_type] => utility [patent_app_number] => 10/323104 [patent_app_country] => US [patent_app_date] => 2002-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3477 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/978/06978344.pdf [firstpage_image] =>[orig_patent_app_number] => 10323104 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/323104
Shift register control of a circular elasticity buffer Dec 17, 2002 Issued
Array ( [id] => 933366 [patent_doc_number] => 06981120 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-12-27 [patent_title] => 'Method and apparatus for virtual memory segmentation' [patent_app_type] => utility [patent_app_number] => 10/287868 [patent_app_country] => US [patent_app_date] => 2002-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4238 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/981/06981120.pdf [firstpage_image] =>[orig_patent_app_number] => 10287868 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/287868
Method and apparatus for virtual memory segmentation Nov 3, 2002 Issued
Array ( [id] => 736037 [patent_doc_number] => 07043599 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-09 [patent_title] => 'Dynamic memory supporting simultaneous refresh and data-access transactions' [patent_app_type] => utility [patent_app_number] => 10/268808 [patent_app_country] => US [patent_app_date] => 2002-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 40 [patent_no_of_words] => 22496 [patent_no_of_claims] => 95 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/043/07043599.pdf [firstpage_image] =>[orig_patent_app_number] => 10268808 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/268808
Dynamic memory supporting simultaneous refresh and data-access transactions Oct 8, 2002 Issued
Array ( [id] => 6717389 [patent_doc_number] => 20030028737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Copying method between logical disks, disk-storage system and its storage medium' [patent_app_type] => new [patent_app_number] => 10/259506 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7421 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20030028737.pdf [firstpage_image] =>[orig_patent_app_number] => 10259506 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/259506
Copying method between logical disks, disk-storage system and its storage medium Sep 29, 2002 Issued
Array ( [id] => 943556 [patent_doc_number] => 06970990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-29 [patent_title] => 'Virtual mode virtual memory manager method and apparatus' [patent_app_type] => utility [patent_app_number] => 10/261866 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 8311 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/970/06970990.pdf [firstpage_image] =>[orig_patent_app_number] => 10261866 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/261866
Virtual mode virtual memory manager method and apparatus Sep 29, 2002 Issued
Array ( [id] => 7282291 [patent_doc_number] => 20040064668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'Memory addressing for a virtual machine implementation on a computer processor supporting virtual hash-page-table searching' [patent_app_type] => new [patent_app_number] => 10/260645 [patent_app_country] => US [patent_app_date] => 2002-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 13721 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20040064668.pdf [firstpage_image] =>[orig_patent_app_number] => 10260645 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/260645
Memory addressing for a virtual machine implementation on a computer processor supporting virtual hash-page-table searching Sep 25, 2002 Issued
Array ( [id] => 1049590 [patent_doc_number] => 06865641 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-08 [patent_title] => 'Method and apparatus for non-volatile display of information for an electronic device' [patent_app_type] => utility [patent_app_number] => 10/232253 [patent_app_country] => US [patent_app_date] => 2002-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3509 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/865/06865641.pdf [firstpage_image] =>[orig_patent_app_number] => 10232253 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/232253
Method and apparatus for non-volatile display of information for an electronic device Aug 28, 2002 Issued
Array ( [id] => 940418 [patent_doc_number] => 06973534 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-06 [patent_title] => 'Apparatus and method to export and then import a logical volume with assigned storage attributes' [patent_app_type] => utility [patent_app_number] => 10/230501 [patent_app_country] => US [patent_app_date] => 2002-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6023 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/973/06973534.pdf [firstpage_image] =>[orig_patent_app_number] => 10230501 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/230501
Apparatus and method to export and then import a logical volume with assigned storage attributes Aug 28, 2002 Issued
Array ( [id] => 958109 [patent_doc_number] => 06957305 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-18 [patent_title] => 'Data streaming mechanism in a microprocessor' [patent_app_type] => utility [patent_app_number] => 10/232248 [patent_app_country] => US [patent_app_date] => 2002-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 4 [patent_no_of_words] => 2463 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/957/06957305.pdf [firstpage_image] =>[orig_patent_app_number] => 10232248 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/232248
Data streaming mechanism in a microprocessor Aug 28, 2002 Issued
Array ( [id] => 953268 [patent_doc_number] => 06961811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-01 [patent_title] => 'Apparatus and method to maintain information by assigning one or more storage attributes to each of a plurality of logical volumes' [patent_app_type] => utility [patent_app_number] => 10/230513 [patent_app_country] => US [patent_app_date] => 2002-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4152 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/961/06961811.pdf [firstpage_image] =>[orig_patent_app_number] => 10230513 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/230513
Apparatus and method to maintain information by assigning one or more storage attributes to each of a plurality of logical volumes Aug 28, 2002 Issued
Array ( [id] => 975462 [patent_doc_number] => 06938142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => 'Multi-bank memory accesses using posted writes' [patent_app_type] => utility [patent_app_number] => 10/232430 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5128 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/938/06938142.pdf [firstpage_image] =>[orig_patent_app_number] => 10232430 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/232430
Multi-bank memory accesses using posted writes Aug 27, 2002 Issued
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