Tatiana L. Nobrega

Array ( [id] => 9583159 [patent_doc_number] => 08773162 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Communication cell for an integrated circuit, chip comprising said communication cell, electronic system including the chip, and test apparatus' [patent_app_type] => utility [patent_app_number] => 12/980832 [patent_app_country] => US [patent_app_date] => 2010-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 7553 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12980832 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8262383 [patent_doc_number] => 20120161812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'LOGIC CIRCUIT WITHOUT ENHANCEMENT MODE TRANSISTORS' [patent_app_type] => utility [patent_app_number] => 12/980264 [patent_app_country] => US [patent_app_date] => 2010-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6827 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12980264 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8262385 [patent_doc_number] => 20120161811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'DRIVER CIRCUIT CORRECTION ARM DECOUPLING RESISTANCE IN STEADY STATE MODE' [patent_app_type] => utility [patent_app_number] => 12/979336 [patent_app_country] => US [patent_app_date] => 2010-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6625 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12979336 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8262429 [patent_doc_number] => 20120161861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'CAPACITOR CELL SUPPORTING CIRCUIT OPERATION AT HIGHER-VOLTAGES WHILE EMPLOYING CAPACITORS DESIGNED FOR LOWER VOLTAGES' [patent_app_type] => utility [patent_app_number] => 12/979387 [patent_app_country] => US [patent_app_date] => 2010-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3645 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12979387 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4473141 [patent_doc_number] => 07944237 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-17 [patent_title] => 'Adjustable hold flip flop and method for adjusting hold requirements' [patent_app_type] => utility [patent_app_number] => 12/969424 [patent_app_country] => US [patent_app_date] => 2010-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3893 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/944/07944237.pdf [firstpage_image] =>[orig_patent_app_number] => 12969424 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7546126 [patent_doc_number] => 08054100 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-11-08 [patent_title] => 'Line transceiver apparatus for multiple transmission standards' [patent_app_type] => utility [patent_app_number] => 12/958410 [patent_app_country] => US [patent_app_date] => 2010-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5170 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/054/08054100.pdf [firstpage_image] =>[orig_patent_app_number] => 12958410 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7753054 [patent_doc_number] => 08111083 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-02-07 [patent_title] => 'Quantum processor' [patent_app_type] => utility [patent_app_number] => 12/957940 [patent_app_country] => US [patent_app_date] => 2010-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4760 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/111/08111083.pdf [firstpage_image] =>[orig_patent_app_number] => 12957940 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6138478 [patent_doc_number] => 20110128042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'Universal IO Unit, Associated Apparatus and Method' [patent_app_type] => utility [patent_app_number] => 12/957520 [patent_app_country] => US [patent_app_date] => 2010-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6864 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20110128042.pdf [firstpage_image] =>[orig_patent_app_number] => 12957520 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8470635 [patent_doc_number] => 08299817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-30 [patent_title] => 'Circuit and method for adding dither to vertical droop compensation using linear feedback shift registers' [patent_app_type] => utility [patent_app_number] => 12/957046 [patent_app_country] => US [patent_app_date] => 2010-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 3787 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12957046 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8556011 [patent_doc_number] => 08330486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-11 [patent_title] => 'Data line termination circuit' [patent_app_type] => utility [patent_app_number] => 12/956416 [patent_app_country] => US [patent_app_date] => 2010-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2855 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12956416 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7998325 [patent_doc_number] => 08081010 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-12-20 [patent_title] => 'Self restoring logic' [patent_app_type] => utility [patent_app_number] => 12/954149 [patent_app_country] => US [patent_app_date] => 2010-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 7773 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/081/08081010.pdf [firstpage_image] =>[orig_patent_app_number] => 12954149 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7505422 [patent_doc_number] => 08035415 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-11 [patent_title] => 'Shift register and semiconductor display device' [patent_app_type] => utility [patent_app_number] => 12/953038 [patent_app_country] => US [patent_app_date] => 2010-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 9437 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 360 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/035/08035415.pdf [firstpage_image] =>[orig_patent_app_number] => 12953038 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8206131 [patent_doc_number] => 20120126852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'HIGH-SPEED STATIC XOR CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/953010 [patent_app_country] => US [patent_app_date] => 2010-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2869 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20120126852.pdf [firstpage_image] =>[orig_patent_app_number] => 12953010 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6155085 [patent_doc_number] => 20110156751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'IMAGE PROCESSING APPARATUS, CONTROL METHOD, AND STORAGE MEDIUM' [patent_app_type] => utility [patent_app_number] => 12/949534 [patent_app_country] => US [patent_app_date] => 2010-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4968 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20110156751.pdf [firstpage_image] =>[orig_patent_app_number] => 12949534 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8446994 [patent_doc_number] => 08289051 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-16 [patent_title] => 'Input/output core design and method of manufacture therefor' [patent_app_type] => utility [patent_app_number] => 12/947948 [patent_app_country] => US [patent_app_date] => 2010-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3669 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12947948 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8193803 [patent_doc_number] => 20120119816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'VARIABLE-WIDTH POWER GATING MODULE' [patent_app_type] => utility [patent_app_number] => 12/948596 [patent_app_country] => US [patent_app_date] => 2010-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5644 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20120119816.pdf [firstpage_image] =>[orig_patent_app_number] => 12948596 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8193740 [patent_doc_number] => 20120119780 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'SINGLE EVENT TRANSIENT DIRECT MEASUREMENT METHODOLOGY AND CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/948004 [patent_app_country] => US [patent_app_date] => 2010-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3288 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20120119780.pdf [firstpage_image] =>[orig_patent_app_number] => 12948004 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7753060 [patent_doc_number] => 08111086 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-07 [patent_title] => 'Methods and systems for selective implementation of progressive display techniques' [patent_app_type] => utility [patent_app_number] => 12/947647 [patent_app_country] => US [patent_app_date] => 2010-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 19093 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/111/08111086.pdf [firstpage_image] =>[orig_patent_app_number] => 12947647 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8116089 [patent_doc_number] => 08159266 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-04-17 [patent_title] => 'Metal configurable integrated circuits' [patent_app_type] => utility [patent_app_number] => 12/947467 [patent_app_country] => US [patent_app_date] => 2010-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 30 [patent_no_of_words] => 14401 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/159/08159266.pdf [firstpage_image] =>[orig_patent_app_number] => 12947467 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8340869 [patent_doc_number] => 08242799 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'System and method for phase error reduction in quantum systems' [patent_app_type] => utility [patent_app_number] => 12/947128 [patent_app_country] => US [patent_app_date] => 2010-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6975 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12947128 [rel_patent_id] =>[rel_patent_doc_number] =>)