Taylor V Oh

Array ( [id] => 16850713 [patent_doc_number] => 20210151458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => Openings Layout of Three-Dimensional Memory Device [patent_app_type] => utility [patent_app_number] => 17/017417 [patent_app_country] => US [patent_app_date] => 2020-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10412 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17017417 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17908769 [patent_doc_number] => 11462633 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/015782 [patent_app_country] => US [patent_app_date] => 2020-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 5740 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 577 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17015782 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17544320 [patent_doc_number] => 11309456 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Nitride semiconductor light emitting device, ultraviolet light emitting module [patent_app_type] => utility [patent_app_number] => 17/010319 [patent_app_country] => US [patent_app_date] => 2020-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 8829 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17010319 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18357938 [patent_doc_number] => 11646345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Semiconductor structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/004231 [patent_app_country] => US [patent_app_date] => 2020-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 24 [patent_no_of_words] => 4949 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17004231 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16509361 [patent_doc_number] => 20200388617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => Memory Arrays Comprising Vertically-Alternating Tiers of Insulative Material and Memory Cells and Methods of Forming a Memory Array [patent_app_type] => utility [patent_app_number] => 17/001906 [patent_app_country] => US [patent_app_date] => 2020-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5480 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17001906 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17431989 [patent_doc_number] => 20220059698 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => STRESS INCORPORATION IN SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/000546 [patent_app_country] => US [patent_app_date] => 2020-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6226 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17000546 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19376846 [patent_doc_number] => 12068428 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Vertical solid state devices [patent_app_type] => utility [patent_app_number] => 16/998455 [patent_app_country] => US [patent_app_date] => 2020-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 49 [patent_no_of_words] => 12452 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16998455 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18249135 [patent_doc_number] => 11605735 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-14 [patent_title] => Semiconductor structure and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 16/993693 [patent_app_country] => US [patent_app_date] => 2020-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 8694 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16993693 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18317671 [patent_doc_number] => 11631757 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-18 [patent_title] => Graphene spin transistor and graphene Rashba spin logic gate for all-electrical operation at room temperature [patent_app_type] => utility [patent_app_number] => 16/941122 [patent_app_country] => US [patent_app_date] => 2020-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9984 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 337 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16941122 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17247286 [patent_doc_number] => 20210367031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => BJT Device Structure and Method for Making the Same [patent_app_type] => utility [patent_app_number] => 16/937845 [patent_app_country] => US [patent_app_date] => 2020-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3254 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16937845 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17986108 [patent_doc_number] => 20220352145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/623992 [patent_app_country] => US [patent_app_date] => 2020-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 61825 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17623992 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17818746 [patent_doc_number] => 11424371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Multi-trench Schottky diode [patent_app_type] => utility [patent_app_number] => 16/936181 [patent_app_country] => US [patent_app_date] => 2020-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4164 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 401 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16936181 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17607318 [patent_doc_number] => 11335810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Method and system for fabrication of a vertical fin-based field effect transistor [patent_app_type] => utility [patent_app_number] => 16/929926 [patent_app_country] => US [patent_app_date] => 2020-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 49 [patent_no_of_words] => 10963 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16929926 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19016502 [patent_doc_number] => 11923447 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Semiconductor device, method of manufacturing semiconductor device, and electronic device [patent_app_type] => utility [patent_app_number] => 16/929811 [patent_app_country] => US [patent_app_date] => 2020-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 40 [patent_no_of_words] => 16000 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16929811 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17986278 [patent_doc_number] => 20220352315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SAME [patent_app_type] => utility [patent_app_number] => 17/626798 [patent_app_country] => US [patent_app_date] => 2020-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7573 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17626798 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16402517 [patent_doc_number] => 20200343375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => LATERAL III-NITRIDE DEVICES INCLUDING A VERTICAL GATE MODULE [patent_app_type] => utility [patent_app_number] => 16/923587 [patent_app_country] => US [patent_app_date] => 2020-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23764 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -34 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16923587 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16966358 [patent_doc_number] => 20210217857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => SEMICONDUCTOR SCHOTTKY RECTIFIER DEVICE [patent_app_type] => utility [patent_app_number] => 16/922048 [patent_app_country] => US [patent_app_date] => 2020-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4244 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16922048 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17159147 [patent_doc_number] => 20210320198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => TRANSISTOR [patent_app_type] => utility [patent_app_number] => 16/922416 [patent_app_country] => US [patent_app_date] => 2020-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1539 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16922416 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16394553 [patent_doc_number] => 20200335494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => Protection Devices with Trigger Devices and Methods of Formation Thereof [patent_app_type] => utility [patent_app_number] => 16/919833 [patent_app_country] => US [patent_app_date] => 2020-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11125 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16919833 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16981595 [patent_doc_number] => 20210225832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => TRANSIENT-VOLTAGE-SUPPRESSION DIODE STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/918460 [patent_app_country] => US [patent_app_date] => 2020-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4851 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16918460 [rel_patent_id] =>[rel_patent_doc_number] =>)