Search

Tekchand Saidha

Examiner (ID: 9531, Phone: (571)272-0940 , Office: P/1652 )

Most Active Art Unit
1652
Art Unit(s)
1814, 1652
Total Applications
2587
Issued Applications
1813
Pending Applications
368
Abandoned Applications
434

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15906085 [patent_doc_number] => 20200152563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/742424 [patent_app_country] => US [patent_app_date] => 2020-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11006 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16742424 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/742424
Semiconductor structure and manufacturing method thereof Jan 13, 2020 Issued
Array ( [id] => 17500723 [patent_doc_number] => 11289433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Semiconductor device packages and methods of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/740168 [patent_app_country] => US [patent_app_date] => 2020-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 26 [patent_no_of_words] => 5866 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16740168 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/740168
Semiconductor device packages and methods of manufacturing the same Jan 9, 2020 Issued
Array ( [id] => 17878571 [patent_doc_number] => 11450595 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => Semiconductor package device with integrated inductor and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/727930 [patent_app_country] => US [patent_app_date] => 2019-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6737 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16727930 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/727930
Semiconductor package device with integrated inductor and manufacturing method thereof Dec 26, 2019 Issued
Array ( [id] => 16920453 [patent_doc_number] => 20210193545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/725307 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725307 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/725307
Semiconductor package structure Dec 22, 2019 Issued
Array ( [id] => 15840653 [patent_doc_number] => 20200135609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => CIRCUIT BOARD AND PACKAGED CHIP [patent_app_type] => utility [patent_app_number] => 16/725511 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2435 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725511 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/725511
Circuit board and packaged chip Dec 22, 2019 Issued
Array ( [id] => 15841285 [patent_doc_number] => 20200135925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => METHOD FOR FORMING STRESSOR, SEMICONDUCTOR DEVICE HAVING STRESSOR, AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/725501 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6918 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725501 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/725501
Method for forming stressor, semiconductor device having stressor, and method for forming the same Dec 22, 2019 Issued
Array ( [id] => 17500729 [patent_doc_number] => 11289439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Optimised fabrication methods for a structure to be assembled by hybridisation and a device comprising such a structure [patent_app_type] => utility [patent_app_number] => 16/723394 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 7835 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16723394 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/723394
Optimised fabrication methods for a structure to be assembled by hybridisation and a device comprising such a structure Dec 19, 2019 Issued
Array ( [id] => 17941725 [patent_doc_number] => 11476184 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Semiconductor device and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/723434 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5727 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16723434 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/723434
Semiconductor device and method for manufacturing the same Dec 19, 2019 Issued
Array ( [id] => 17326493 [patent_doc_number] => 11217518 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-04 [patent_title] => Package structure and method of forming the same [patent_app_type] => utility [patent_app_number] => 16/714819 [patent_app_country] => US [patent_app_date] => 2019-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 33 [patent_no_of_words] => 8415 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16714819 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/714819
Package structure and method of forming the same Dec 15, 2019 Issued
Array ( [id] => 15775881 [patent_doc_number] => 20200118958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/714811 [patent_app_country] => US [patent_app_date] => 2019-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7833 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16714811 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/714811
Package structure and method of manufacturing the same Dec 15, 2019 Issued
Array ( [id] => 15775977 [patent_doc_number] => 20200119006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => MANUFACTURING METHOD OF INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/714465 [patent_app_country] => US [patent_app_date] => 2019-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6876 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16714465 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/714465
Manufacturing method of integrated circuit Dec 12, 2019 Issued
Array ( [id] => 17018472 [patent_doc_number] => 11088117 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Semiconductor package including stacked semiconductor chips [patent_app_type] => utility [patent_app_number] => 16/709786 [patent_app_country] => US [patent_app_date] => 2019-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 7735 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16709786 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/709786
Semiconductor package including stacked semiconductor chips Dec 9, 2019 Issued
Array ( [id] => 18172922 [patent_doc_number] => 11572624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Apparatus and method for semiconductor fabrication [patent_app_type] => utility [patent_app_number] => 16/708730 [patent_app_country] => US [patent_app_date] => 2019-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7565 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16708730 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/708730
Apparatus and method for semiconductor fabrication Dec 9, 2019 Issued
Array ( [id] => 17381111 [patent_doc_number] => 11239144 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Semiconductor device and method of producing semiconductor device [patent_app_type] => utility [patent_app_number] => 16/706242 [patent_app_country] => US [patent_app_date] => 2019-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 12847 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16706242 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/706242
Semiconductor device and method of producing semiconductor device Dec 5, 2019 Issued
Array ( [id] => 17289099 [patent_doc_number] => 11205660 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-21 [patent_title] => Memory arrays and methods used in forming a memory array comprising strings of memory cells [patent_app_type] => utility [patent_app_number] => 16/705388 [patent_app_country] => US [patent_app_date] => 2019-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 26 [patent_no_of_words] => 7163 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16705388 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/705388
Memory arrays and methods used in forming a memory array comprising strings of memory cells Dec 5, 2019 Issued
Array ( [id] => 15745731 [patent_doc_number] => 20200111755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => Forming Large Chips Through Stitching [patent_app_type] => utility [patent_app_number] => 16/704303 [patent_app_country] => US [patent_app_date] => 2019-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5404 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16704303 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/704303
Forming large chips through stitching Dec 4, 2019 Issued
Array ( [id] => 15745963 [patent_doc_number] => 20200111871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/703780 [patent_app_country] => US [patent_app_date] => 2019-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3282 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16703780 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/703780
Semiconductor device and method for fabricating the same Dec 3, 2019 Issued
Array ( [id] => 17438998 [patent_doc_number] => 11264339 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-01 [patent_title] => Method of manufacturing connection structure of semiconductor chip and method of manufacturing semiconductor package [patent_app_type] => utility [patent_app_number] => 16/703239 [patent_app_country] => US [patent_app_date] => 2019-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 7735 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16703239 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/703239
Method of manufacturing connection structure of semiconductor chip and method of manufacturing semiconductor package Dec 3, 2019 Issued
Array ( [id] => 15717833 [patent_doc_number] => 20200105684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/702104 [patent_app_country] => US [patent_app_date] => 2019-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6928 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16702104 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/702104
Semiconductor package structure Dec 2, 2019 Issued
Array ( [id] => 16873645 [patent_doc_number] => 20210167112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => FANOUT WAFER LEVEL PACKAGE FOR OPTICAL DEVICES AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 16/701533 [patent_app_country] => US [patent_app_date] => 2019-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6650 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16701533 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/701533
FANOUT WAFER LEVEL PACKAGE FOR OPTICAL DEVICES AND RELATED METHODS Dec 2, 2019 Abandoned
Menu