Search

Telly D. Green

Examiner (ID: 11748)

Most Active Art Unit
2822
Art Unit(s)
2809, 2898, 2822
Total Applications
1668
Issued Applications
1348
Pending Applications
113
Abandoned Applications
249

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19038280 [patent_doc_number] => 20240088095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => FABRICATING METHOD OF SEMICONDUCTOR DIE WITH TAPERED SIDEWALL IN PACKAGE [patent_app_type] => utility [patent_app_number] => 18/518794 [patent_app_country] => US [patent_app_date] => 2023-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9751 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518794 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/518794
FABRICATING METHOD OF SEMICONDUCTOR DIE WITH TAPERED SIDEWALL IN PACKAGE Nov 23, 2023 Pending
Array ( [id] => 19038147 [patent_doc_number] => 20240087962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 18/518634 [patent_app_country] => US [patent_app_date] => 2023-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4668 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518634 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/518634
SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THEREOF Nov 23, 2023 Pending
Array ( [id] => 19038280 [patent_doc_number] => 20240088095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => FABRICATING METHOD OF SEMICONDUCTOR DIE WITH TAPERED SIDEWALL IN PACKAGE [patent_app_type] => utility [patent_app_number] => 18/518794 [patent_app_country] => US [patent_app_date] => 2023-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9751 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518794 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/518794
FABRICATING METHOD OF SEMICONDUCTOR DIE WITH TAPERED SIDEWALL IN PACKAGE Nov 23, 2023 Pending
Array ( [id] => 19038303 [patent_doc_number] => 20240088118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/508663 [patent_app_country] => US [patent_app_date] => 2023-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9472 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18508663 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/508663
Semiconductor package Nov 13, 2023 Issued
Array ( [id] => 19054790 [patent_doc_number] => 20240096759 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => SMDS INTEGRATION ON QFN BY 3D STACKED SOLUTION [patent_app_type] => utility [patent_app_number] => 18/508007 [patent_app_country] => US [patent_app_date] => 2023-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5373 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18508007 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/508007
SMDs integration on QFN by 3D stacked solution Nov 12, 2023 Issued
Array ( [id] => 19935136 [patent_doc_number] => 12308344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-20 [patent_title] => Multi-chip package having stress relief structure [patent_app_type] => utility [patent_app_number] => 18/496920 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 4607 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18496920 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/496920
Multi-chip package having stress relief structure Oct 29, 2023 Issued
Array ( [id] => 18959121 [patent_doc_number] => 20240047448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => SEMICONDUCTOR DEVICE WITH REDISTRIBUTION STRUCTURE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/381297 [patent_app_country] => US [patent_app_date] => 2023-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10422 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18381297 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/381297
Semiconductor device with redistribution structure Oct 17, 2023 Issued
Array ( [id] => 18959053 [patent_doc_number] => 20240047380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => DUMMY PATTERN STRUCTURE FOR REDUCING DISHING [patent_app_type] => utility [patent_app_number] => 18/488052 [patent_app_country] => US [patent_app_date] => 2023-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11784 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18488052 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/488052
Dummy pattern structure for reducing dishing Oct 16, 2023 Issued
Array ( [id] => 19116674 [patent_doc_number] => 20240128424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => SEMICONDUCTOR DEVICE, SENSOR, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/485684 [patent_app_country] => US [patent_app_date] => 2023-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5431 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18485684 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/485684
SEMICONDUCTOR DEVICE, SENSOR, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Oct 11, 2023 Pending
Array ( [id] => 19116674 [patent_doc_number] => 20240128424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => SEMICONDUCTOR DEVICE, SENSOR, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/485684 [patent_app_country] => US [patent_app_date] => 2023-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5431 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18485684 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/485684
SEMICONDUCTOR DEVICE, SENSOR, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Oct 11, 2023 Pending
Array ( [id] => 18959120 [patent_doc_number] => 20240047447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH REDISTRIBUTION STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/378892 [patent_app_country] => US [patent_app_date] => 2023-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10423 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18378892 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/378892
Method for fabricating semiconductor device with redistribution structure Oct 10, 2023 Issued
Array ( [id] => 19945469 [patent_doc_number] => 12317619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Solid-state imaging device and electronic device [patent_app_type] => utility [patent_app_number] => 18/379029 [patent_app_country] => US [patent_app_date] => 2023-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 7053 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18379029 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/379029
Solid-state imaging device and electronic device Oct 10, 2023 Issued
Array ( [id] => 18943554 [patent_doc_number] => 20240038693 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/482002 [patent_app_country] => US [patent_app_date] => 2023-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4357 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18482002 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/482002
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Oct 4, 2023 Abandoned
Array ( [id] => 18898687 [patent_doc_number] => 20240014172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => VERTICALLY MOUNTED DIE GROUPS [patent_app_type] => utility [patent_app_number] => 18/473273 [patent_app_country] => US [patent_app_date] => 2023-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13057 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18473273 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/473273
Vertically mounted die groups Sep 23, 2023 Issued
Array ( [id] => 18882996 [patent_doc_number] => 20240006365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/467840 [patent_app_country] => US [patent_app_date] => 2023-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8410 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18467840 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/467840
Manufacturing method of semiconductor package structure Sep 14, 2023 Issued
Array ( [id] => 18883736 [patent_doc_number] => 20240007105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => SEMICONDUCTOR MODULE, AND ELECTRONIC DEVICE HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 18/467716 [patent_app_country] => US [patent_app_date] => 2023-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9276 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18467716 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/467716
SEMICONDUCTOR MODULE, AND ELECTRONIC DEVICE HAVING THE SAME Sep 13, 2023 Pending
Array ( [id] => 20080587 [patent_doc_number] => 12354662 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Apparatuses comprising transistors including extension regions [patent_app_type] => utility [patent_app_number] => 18/465038 [patent_app_country] => US [patent_app_date] => 2023-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 5307 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18465038 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/465038
Apparatuses comprising transistors including extension regions Sep 10, 2023 Issued
Array ( [id] => 20080587 [patent_doc_number] => 12354662 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Apparatuses comprising transistors including extension regions [patent_app_type] => utility [patent_app_number] => 18/465038 [patent_app_country] => US [patent_app_date] => 2023-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 5307 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18465038 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/465038
Apparatuses comprising transistors including extension regions Sep 10, 2023 Issued
Array ( [id] => 20080587 [patent_doc_number] => 12354662 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Apparatuses comprising transistors including extension regions [patent_app_type] => utility [patent_app_number] => 18/465038 [patent_app_country] => US [patent_app_date] => 2023-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 5307 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18465038 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/465038
Apparatuses comprising transistors including extension regions Sep 10, 2023 Issued
Array ( [id] => 18868129 [patent_doc_number] => 20230422566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/462522 [patent_app_country] => US [patent_app_date] => 2023-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9451 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18462522 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/462522
Display device Sep 6, 2023 Issued
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