Search

Telly D. Green

Examiner (ID: 11748)

Most Active Art Unit
2822
Art Unit(s)
2809, 2898, 2822
Total Applications
1668
Issued Applications
1348
Pending Applications
113
Abandoned Applications
249

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14301203 [patent_doc_number] => 10290735 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-14 [patent_title] => Methods of manufacturing a semiconductor device with a buried doped region and a contact structure [patent_app_type] => utility [patent_app_number] => 15/855563 [patent_app_country] => US [patent_app_date] => 2017-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 7469 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15855563 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/855563
Methods of manufacturing a semiconductor device with a buried doped region and a contact structure Dec 26, 2017 Issued
Array ( [id] => 16668680 [patent_doc_number] => 10937939 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-02 [patent_title] => Thermoelectric conversion material and thermoelectric conversion element [patent_app_type] => utility [patent_app_number] => 16/472985 [patent_app_country] => US [patent_app_date] => 2017-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4528 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 15 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16472985 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/472985
Thermoelectric conversion material and thermoelectric conversion element Dec 21, 2017 Issued
Array ( [id] => 12917605 [patent_doc_number] => 20180197711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-12 [patent_title] => METHOD FOR THE FABRICATION OF ELECTRON FIELD EMISSION DEVICES INCLUDING CARBON NANOTUBE ELECTRON FIELD EMISSION DEVICES [patent_app_type] => utility [patent_app_number] => 15/853485 [patent_app_country] => US [patent_app_date] => 2017-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8751 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15853485 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/853485
Method for the fabrication of electron field emission devices including carbon nanotube electron field emission devices Dec 21, 2017 Issued
Array ( [id] => 12693457 [patent_doc_number] => 20180122985 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => ADVANCED ELECTRONIC DEVICE STRUCTURES USING SEMICONDUCTOR STRUCTURES AND SUPERLATTICES [patent_app_type] => utility [patent_app_number] => 15/853379 [patent_app_country] => US [patent_app_date] => 2017-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15307 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15853379 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/853379
Advanced electronic device structures using semiconductor structures and superlattices Dec 21, 2017 Issued
Array ( [id] => 12739165 [patent_doc_number] => 20180138222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => OPTICAL MODULES INCLUDING CUSTOMIZABLE SPACERS FOR FOCAL LENGTH ADJUSTMENT AND/OR REDUCTION OF TILT, AND FABRICATION OF THE OPTICAL MODULES [patent_app_type] => utility [patent_app_number] => 15/850003 [patent_app_country] => US [patent_app_date] => 2017-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7558 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15850003 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/850003
Optical modules including customizable spacers for focal length adjustment and/or reduction of tilt, and fabrication of the optical modules Dec 20, 2017 Issued
Array ( [id] => 14267905 [patent_doc_number] => 10283524 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-05-07 [patent_title] => Methods of filling horizontally-extending openings of integrated assemblies [patent_app_type] => utility [patent_app_number] => 15/848612 [patent_app_country] => US [patent_app_date] => 2017-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5800 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15848612 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/848612
Methods of filling horizontally-extending openings of integrated assemblies Dec 19, 2017 Issued
Array ( [id] => 14460059 [patent_doc_number] => 10326004 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-06-18 [patent_title] => Double patterning epitaxy fin [patent_app_type] => utility [patent_app_number] => 15/848544 [patent_app_country] => US [patent_app_date] => 2017-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 3278 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15848544 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/848544
Double patterning epitaxy fin Dec 19, 2017 Issued
Array ( [id] => 14300825 [patent_doc_number] => 10290543 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-05-14 [patent_title] => Method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 15/848986 [patent_app_country] => US [patent_app_date] => 2017-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2384 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15848986 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/848986
Method for manufacturing semiconductor device Dec 19, 2017 Issued
Array ( [id] => 15139815 [patent_doc_number] => 10483395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Method for fabricating semiconductor device [patent_app_type] => utility [patent_app_number] => 15/849599 [patent_app_country] => US [patent_app_date] => 2017-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2679 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15849599 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/849599
Method for fabricating semiconductor device Dec 19, 2017 Issued
Array ( [id] => 13306481 [patent_doc_number] => 20180204777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-19 [patent_title] => METHOD OF PROCESSING SUBSTRATE AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING THE SAME [patent_app_type] => utility [patent_app_number] => 15/848896 [patent_app_country] => US [patent_app_date] => 2017-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3902 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15848896 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/848896
Method of processing substrate and method of fabricating semiconductor device using the same Dec 19, 2017 Issued
Array ( [id] => 12850198 [patent_doc_number] => 20180175239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => METHOD FOR MANUFACTURING LIGHT-EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 15/849123 [patent_app_country] => US [patent_app_date] => 2017-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14488 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15849123 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/849123
Method for manufacturing light-emitting device Dec 19, 2017 Issued
Array ( [id] => 12652116 [patent_doc_number] => 20180109203 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-19 [patent_title] => Method of Manufacturing a Device with a Cavity [patent_app_type] => utility [patent_app_number] => 15/846727 [patent_app_country] => US [patent_app_date] => 2017-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7573 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15846727 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/846727
Method of manufacturing a device with a cavity Dec 18, 2017 Issued
Array ( [id] => 13755365 [patent_doc_number] => 10170637 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-01 [patent_title] => Perfectly symmetric gate-all-around FET on suspended nanowire [patent_app_type] => utility [patent_app_number] => 15/843735 [patent_app_country] => US [patent_app_date] => 2017-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 11257 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15843735 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/843735
Perfectly symmetric gate-all-around FET on suspended nanowire Dec 14, 2017 Issued
Array ( [id] => 15123807 [patent_doc_number] => 20190348537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/473086 [patent_app_country] => US [patent_app_date] => 2017-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 42123 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16473086 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/473086
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Dec 13, 2017 Abandoned
Array ( [id] => 12800974 [patent_doc_number] => 20180158827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-07 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/834203 [patent_app_country] => US [patent_app_date] => 2017-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13675 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15834203 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/834203
Semiconductor device and semiconductor package including the same Dec 6, 2017 Issued
Array ( [id] => 12823510 [patent_doc_number] => 20180166342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/834681 [patent_app_country] => US [patent_app_date] => 2017-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6025 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15834681 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/834681
Semiconductor device and fabrication method thereof Dec 6, 2017 Issued
Array ( [id] => 14301033 [patent_doc_number] => 10290648 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-05-14 [patent_title] => Three-dimensional memory device containing air gap rails and method of making thereof [patent_app_type] => utility [patent_app_number] => 15/834261 [patent_app_country] => US [patent_app_date] => 2017-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 35 [patent_no_of_words] => 16652 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15834261 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/834261
Three-dimensional memory device containing air gap rails and method of making thereof Dec 6, 2017 Issued
Array ( [id] => 13528477 [patent_doc_number] => 20180315781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => COMPLEMENTARY THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND ARRAY SUBSTRATE [patent_app_type] => utility [patent_app_number] => 15/834198 [patent_app_country] => US [patent_app_date] => 2017-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9003 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15834198 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/834198
COMPLEMENTARY THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND ARRAY SUBSTRATE Dec 6, 2017 Abandoned
Array ( [id] => 12824344 [patent_doc_number] => 20180166620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 15/834132 [patent_app_country] => US [patent_app_date] => 2017-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3575 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15834132 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/834132
ELECTRONIC DEVICE Dec 6, 2017 Abandoned
Array ( [id] => 16201993 [patent_doc_number] => 10727173 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-28 [patent_title] => Power module and power conversion system including same [patent_app_type] => utility [patent_app_number] => 15/834541 [patent_app_country] => US [patent_app_date] => 2017-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3501 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15834541 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/834541
Power module and power conversion system including same Dec 6, 2017 Issued
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