Search

Telly D. Green

Examiner (ID: 11748)

Most Active Art Unit
2822
Art Unit(s)
2809, 2898, 2822
Total Applications
1668
Issued Applications
1348
Pending Applications
113
Abandoned Applications
249

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13695193 [patent_doc_number] => 20170358551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-14 [patent_title] => Hybrid Bonding Systems and Methods for Semiconductor Wafers [patent_app_type] => utility [patent_app_number] => 15/689982 [patent_app_country] => US [patent_app_date] => 2017-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6327 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15689982 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/689982
Hybrid bonding systems and methods for semiconductor wafers Aug 28, 2017 Issued
Array ( [id] => 13695511 [patent_doc_number] => 20170358710 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-14 [patent_title] => LIGHT EMITTING DIODE CHIP [patent_app_type] => utility [patent_app_number] => 15/672179 [patent_app_country] => US [patent_app_date] => 2017-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7258 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15672179 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/672179
Light emitting diode chip Aug 7, 2017 Issued
Array ( [id] => 12055834 [patent_doc_number] => 20170332178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-16 [patent_title] => 'MEMS PROCESS AND DEVICE' [patent_app_type] => utility [patent_app_number] => 15/665941 [patent_app_country] => US [patent_app_date] => 2017-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5198 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15665941 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/665941
MEMS PROCESS AND DEVICE Jul 31, 2017 Abandoned
Array ( [id] => 12154874 [patent_doc_number] => 20180026138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'TFT circuit board and display device having the same' [patent_app_type] => utility [patent_app_number] => 15/649126 [patent_app_country] => US [patent_app_date] => 2017-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7645 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15649126 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/649126
TFT circuit board and display device having the same Jul 12, 2017 Issued
Array ( [id] => 12005616 [patent_doc_number] => 20170309771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'OPTICAL SENSOR MODULE AND SENSOR CHIP THEREOF' [patent_app_type] => utility [patent_app_number] => 15/646533 [patent_app_country] => US [patent_app_date] => 2017-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9524 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15646533 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/646533
Optical sensor module and sensor chip thereof Jul 10, 2017 Issued
Array ( [id] => 12115150 [patent_doc_number] => 09871145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-16 [patent_title] => 'Semiconductor device, manufacturing method thereof, and electronic device' [patent_app_type] => utility [patent_app_number] => 15/628699 [patent_app_country] => US [patent_app_date] => 2017-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 70 [patent_figures_cnt] => 200 [patent_no_of_words] => 55221 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15628699 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/628699
Semiconductor device, manufacturing method thereof, and electronic device Jun 20, 2017 Issued
Array ( [id] => 11990194 [patent_doc_number] => 20170294349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-12 [patent_title] => 'TWO-DIMENSIONAL SELF-ALIGNED SUPER VIA INTEGRATION ON SELF-ALIGNED GATE CONTACT' [patent_app_type] => utility [patent_app_number] => 15/623758 [patent_app_country] => US [patent_app_date] => 2017-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 7331 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15623758 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/623758
Two-dimensional self-aligned super via integration on self-aligned gate contact Jun 14, 2017 Issued
Array ( [id] => 11967040 [patent_doc_number] => 20170271192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => 'COMPLIANT BIPOLAR MICRO DEVICE TRANSFER HEAD WITH SILICON ELECTRODES' [patent_app_type] => utility [patent_app_number] => 15/616676 [patent_app_country] => US [patent_app_date] => 2017-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 15017 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15616676 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/616676
Compliant bipolar micro device transfer head with silicon electrodes Jun 6, 2017 Issued
Array ( [id] => 11967135 [patent_doc_number] => 20170271288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => 'Multi-chip package and manufacturing method' [patent_app_type] => utility [patent_app_number] => 15/611812 [patent_app_country] => US [patent_app_date] => 2017-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6563 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15611812 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/611812
Multi-chip package and manufacturing method Jun 1, 2017 Abandoned
Array ( [id] => 13893435 [patent_doc_number] => 10199270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-05 [patent_title] => Multi-directional self-aligned multiple patterning [patent_app_type] => utility [patent_app_number] => 15/605327 [patent_app_country] => US [patent_app_date] => 2017-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3382 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15605327 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/605327
Multi-directional self-aligned multiple patterning May 24, 2017 Issued
Array ( [id] => 11959465 [patent_doc_number] => 20170263617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'LOW COST HIGH PERFORMANCE EEPROM DEVICE' [patent_app_type] => utility [patent_app_number] => 15/602084 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6815 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15602084 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/602084
Low cost high performance EEPROM device May 21, 2017 Issued
Array ( [id] => 13019195 [patent_doc_number] => 10032715 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-24 [patent_title] => Ultra high performance interposer [patent_app_type] => utility [patent_app_number] => 15/601406 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 33 [patent_no_of_words] => 7365 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601406 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601406
Ultra high performance interposer May 21, 2017 Issued
Array ( [id] => 11959661 [patent_doc_number] => 20170263813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'Advanced Electronic Device Structures Using Semiconductor Structures and Superlattices' [patent_app_type] => utility [patent_app_number] => 15/601890 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 16638 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15601890 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/601890
Advanced electronic device structures using semiconductor structures and superlattices May 21, 2017 Issued
Array ( [id] => 12033735 [patent_doc_number] => 20170323833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-09 [patent_title] => 'MINIMIZE MIDDLE-OF-LINE CONTACT LINE SHORTS' [patent_app_type] => utility [patent_app_number] => 15/597871 [patent_app_country] => US [patent_app_date] => 2017-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4520 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15597871 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/597871
Minimize middle-of-line contact line shorts May 16, 2017 Issued
Array ( [id] => 11869528 [patent_doc_number] => 20170236813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'Packaging Mechanisms for Dies With Different Sizes of Connectors' [patent_app_type] => utility [patent_app_number] => 15/585971 [patent_app_country] => US [patent_app_date] => 2017-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6395 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15585971 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/585971
Packaging mechanisms for dies with different sizes of connectors May 2, 2017 Issued
Array ( [id] => 13528425 [patent_doc_number] => 20180315755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => VERTICAL TRANSPORT TRANSISTORS WITH EQUAL GATE STACK THICKNESSES [patent_app_type] => utility [patent_app_number] => 15/582905 [patent_app_country] => US [patent_app_date] => 2017-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6205 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15582905 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/582905
Vertical transport transistors with equal gate stack thicknesses Apr 30, 2017 Issued
Array ( [id] => 12026853 [patent_doc_number] => 20170316952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'TRANSITION METAL-BEARING CAPPING FILM FOR GROUP III-NITRIDE DEVICES' [patent_app_type] => utility [patent_app_number] => 15/582785 [patent_app_country] => US [patent_app_date] => 2017-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3734 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15582785 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/582785
Transition metal-bearing capping film for group III-nitride devices Apr 30, 2017 Issued
Array ( [id] => 13528497 [patent_doc_number] => 20180315791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => IMAGE SENSOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 15/582753 [patent_app_country] => US [patent_app_date] => 2017-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3362 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15582753 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/582753
IMAGE SENSOR STRUCTURE Apr 29, 2017 Abandoned
Array ( [id] => 12026937 [patent_doc_number] => 20170317036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'Cavity based feature on chip carrier' [patent_app_type] => utility [patent_app_number] => 15/582646 [patent_app_country] => US [patent_app_date] => 2017-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8059 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15582646 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/582646
Cavity based feature on chip carrier Apr 28, 2017 Abandoned
Array ( [id] => 12129228 [patent_doc_number] => 20180012814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-11 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/498924 [patent_app_country] => US [patent_app_date] => 2017-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7132 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15498924 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/498924
Semiconductor device Apr 26, 2017 Issued
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