Search

Telly D. Green

Examiner (ID: 11748)

Most Active Art Unit
2822
Art Unit(s)
2809, 2898, 2822
Total Applications
1668
Issued Applications
1348
Pending Applications
113
Abandoned Applications
249

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18958992 [patent_doc_number] => 20240047319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/125348 [patent_app_country] => US [patent_app_date] => 2023-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6109 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18125348 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/125348
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME Mar 22, 2023 Pending
Array ( [id] => 19468147 [patent_doc_number] => 20240321817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => IMPROVED BONDING STRUCTURES FOR SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/188597 [patent_app_country] => US [patent_app_date] => 2023-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16696 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18188597 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/188597
IMPROVED BONDING STRUCTURES FOR SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME Mar 22, 2023 Pending
Array ( [id] => 19468102 [patent_doc_number] => 20240321772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => REINFORCEMENT STRUCTURES FOR CHIP-INTERPOSER AND INTERPOSER-SUBSTRATE BONDING AND METHODS OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 18/124752 [patent_app_country] => US [patent_app_date] => 2023-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18124752 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/124752
REINFORCEMENT STRUCTURES FOR CHIP-INTERPOSER AND INTERPOSER-SUBSTRATE BONDING AND METHODS OF MAKING THE SAME Mar 21, 2023 Pending
Array ( [id] => 19468102 [patent_doc_number] => 20240321772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => REINFORCEMENT STRUCTURES FOR CHIP-INTERPOSER AND INTERPOSER-SUBSTRATE BONDING AND METHODS OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 18/124752 [patent_app_country] => US [patent_app_date] => 2023-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18124752 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/124752
REINFORCEMENT STRUCTURES FOR CHIP-INTERPOSER AND INTERPOSER-SUBSTRATE BONDING AND METHODS OF MAKING THE SAME Mar 21, 2023 Pending
Array ( [id] => 18696460 [patent_doc_number] => 20230326899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => DELAMINATION/CRACKING IMPROVEMENT AT SOLDER JOINTS IN MICROELECTRONICS PACKAGE [patent_app_type] => utility [patent_app_number] => 18/187386 [patent_app_country] => US [patent_app_date] => 2023-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6309 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18187386 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/187386
DELAMINATION/CRACKING IMPROVEMENT AT SOLDER JOINTS IN MICROELECTRONICS PACKAGE Mar 20, 2023 Pending
Array ( [id] => 18833878 [patent_doc_number] => 20230402405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => PROTECTION LAYER FOR SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/186754 [patent_app_country] => US [patent_app_date] => 2023-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9184 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18186754 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/186754
PROTECTION LAYER FOR SEMICONDUCTOR DEVICE Mar 19, 2023 Pending
Array ( [id] => 18488586 [patent_doc_number] => 20230215934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => CONFINED EPITAXIAL REGIONS FOR SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES HAVING CONFINED EPITAXIAL REGIONS [patent_app_type] => utility [patent_app_number] => 18/120920 [patent_app_country] => US [patent_app_date] => 2023-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10583 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18120920 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/120920
Confined epitaxial regions for semiconductor devices Mar 12, 2023 Issued
Array ( [id] => 18848824 [patent_doc_number] => 20230411228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/180926 [patent_app_country] => US [patent_app_date] => 2023-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8213 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18180926 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/180926
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Mar 8, 2023 Pending
Array ( [id] => 19038154 [patent_doc_number] => 20240087969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/179669 [patent_app_country] => US [patent_app_date] => 2023-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4057 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 411 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18179669 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/179669
SEMICONDUCTOR DEVICE Mar 6, 2023 Pending
Array ( [id] => 18467332 [patent_doc_number] => 20230201613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => Interconnect Structure and Method of Forming Same [patent_app_type] => utility [patent_app_number] => 18/178732 [patent_app_country] => US [patent_app_date] => 2023-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6596 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18178732 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/178732
Interconnect Structure and Method of Forming Same Mar 5, 2023 Pending
Array ( [id] => 19342695 [patent_doc_number] => 12052902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-30 [patent_title] => Organic light emitting display device [patent_app_type] => utility [patent_app_number] => 18/114919 [patent_app_country] => US [patent_app_date] => 2023-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 18983 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18114919 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/114919
Organic light emitting display device Feb 26, 2023 Issued
Array ( [id] => 18927172 [patent_doc_number] => 20240030176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => METHOD OF FABRICATING SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/112323 [patent_app_country] => US [patent_app_date] => 2023-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7182 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18112323 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/112323
METHOD OF FABRICATING SEMICONDUCTOR PACKAGE Feb 20, 2023 Pending
Array ( [id] => 19107029 [patent_doc_number] => 11960127 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Semiconductor package and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/167077 [patent_app_country] => US [patent_app_date] => 2023-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 11330 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18167077 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/167077
Semiconductor package and manufacturing method thereof Feb 9, 2023 Issued
Array ( [id] => 18382095 [patent_doc_number] => 20230157186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => NON-STOICHIOMETRIC RESISTIVE SWITCHING MEMORY DEVICE AND FABRICATION METHODS [patent_app_type] => utility [patent_app_number] => 18/097748 [patent_app_country] => US [patent_app_date] => 2023-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9475 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18097748 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/097748
Non-stoichiometric resistive switching memory device and fabrication methods Jan 16, 2023 Issued
Array ( [id] => 18743479 [patent_doc_number] => 20230352467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => PACKAGING STRUCTURE AND PACKAGING METHOD [patent_app_type] => utility [patent_app_number] => 18/096088 [patent_app_country] => US [patent_app_date] => 2023-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9858 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18096088 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/096088
PACKAGING STRUCTURE AND PACKAGING METHOD Jan 11, 2023 Pending
Array ( [id] => 19887030 [patent_doc_number] => 12272764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-08 [patent_title] => Advanced electronic device structures using semiconductor structures and superlattices [patent_app_type] => utility [patent_app_number] => 18/152452 [patent_app_country] => US [patent_app_date] => 2023-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 61 [patent_no_of_words] => 15361 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18152452 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/152452
Advanced electronic device structures using semiconductor structures and superlattices Jan 9, 2023 Issued
Array ( [id] => 19269532 [patent_doc_number] => 20240213236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => INTEGRATED CIRCUIT PACKAGE AND METHOD [patent_app_type] => utility [patent_app_number] => 18/151629 [patent_app_country] => US [patent_app_date] => 2023-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12257 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18151629 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/151629
INTEGRATED CIRCUIT PACKAGE AND METHOD Jan 8, 2023 Pending
Array ( [id] => 19071106 [patent_doc_number] => 20240105532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => CHIP PACKAGING METHOD AND CHIP PACKAGING STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/149077 [patent_app_country] => US [patent_app_date] => 2022-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5226 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18149077 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/149077
CHIP PACKAGING METHOD AND CHIP PACKAGING STRUCTURE Dec 30, 2022 Pending
Array ( [id] => 19269506 [patent_doc_number] => 20240213210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => SYSTEM AND METHOD FOR USING ACOUSTIC WAVES TO COUNTERACT DEFORMATIONS DURING BONDING [patent_app_type] => utility [patent_app_number] => 18/146265 [patent_app_country] => US [patent_app_date] => 2022-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9121 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18146265 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/146265
SYSTEM AND METHOD FOR USING ACOUSTIC WAVES TO COUNTERACT DEFORMATIONS DURING BONDING Dec 22, 2022 Pending
Array ( [id] => 19269696 [patent_doc_number] => 20240213401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => TEXTURED LUMIPHORE LAYER TO IMPROVE LIGHT EXTRACTION FOR LIGHT-EMITTING DIODE CHIPS AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 18/085672 [patent_app_country] => US [patent_app_date] => 2022-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6623 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18085672 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/085672
TEXTURED LUMIPHORE LAYER TO IMPROVE LIGHT EXTRACTION FOR LIGHT-EMITTING DIODE CHIPS AND RELATED METHODS Dec 20, 2022 Pending
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