Telly D. Green

Array ( [id] => 9117172 [patent_doc_number] => 20130284094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'Modular System for Continuous Deposition of a Thin Film Layer on a Substrate' [patent_app_type] => utility [patent_app_number] => 13/937765 [patent_app_country] => US [patent_app_date] => 2013-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5396 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13937765 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9792790 [patent_doc_number] => 20150004734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-01 [patent_title] => 'NOZZLE ASSEMBLY AND METHOD FOR FABRICATING A SOLAR CELL' [patent_app_type] => utility [patent_app_number] => 13/929827 [patent_app_country] => US [patent_app_date] => 2013-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5853 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13929827 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9274043 [patent_doc_number] => 08637977 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-28 [patent_title] => 'Semiconductor device and method of packaging a semiconductor device with a clip' [patent_app_type] => utility [patent_app_number] => 13/928835 [patent_app_country] => US [patent_app_date] => 2013-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 25 [patent_no_of_words] => 3580 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13928835 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9789666 [patent_doc_number] => 20150001610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-01 [patent_title] => 'INTEGRATED CIRCUITS HAVING IMPROVED SPLIT-GATE NONVOLATILE MEMORY DEVICES AND METHODS FOR FABRICATION OF SAME' [patent_app_type] => utility [patent_app_number] => 13/929393 [patent_app_country] => US [patent_app_date] => 2013-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4851 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13929393 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9756882 [patent_doc_number] => 20140287583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-25 [patent_title] => 'ELECTRICALLY CONDUCTIVE PASTE FOR FRONT ELECTRODE OF SOLAR CELL AND PREPARATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/894908 [patent_app_country] => US [patent_app_date] => 2013-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11940 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13894908 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10042255 [patent_doc_number] => 09082969 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-14 [patent_title] => 'Keyhole-free sloped heater for phase change memory' [patent_app_type] => utility [patent_app_number] => 13/923759 [patent_app_country] => US [patent_app_date] => 2013-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 4831 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13923759 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11599717 [patent_doc_number] => 09646894 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-09 [patent_title] => 'Packaging mechanisms for dies with different sizes of connectors' [patent_app_type] => utility [patent_app_number] => 13/922023 [patent_app_country] => US [patent_app_date] => 2013-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 6347 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13922023 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9530610 [patent_doc_number] => 08754486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-17 [patent_title] => 'IO ESD device and methods for forming the same' [patent_app_type] => utility [patent_app_number] => 13/918706 [patent_app_country] => US [patent_app_date] => 2013-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 3558 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13918706 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9091321 [patent_doc_number] => 20130270632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-17 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING A FLOATING SEMICONDUCTOR ZONE' [patent_app_type] => utility [patent_app_number] => 13/916929 [patent_app_country] => US [patent_app_date] => 2013-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6218 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13916929 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9205512 [patent_doc_number] => 20140004689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'Methods Of Doping Substrates With ALD' [patent_app_type] => utility [patent_app_number] => 13/917039 [patent_app_country] => US [patent_app_date] => 2013-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5567 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13917039 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11483307 [patent_doc_number] => 09589862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-07 [patent_title] => 'Interconnect structures and methods of forming same' [patent_app_type] => utility [patent_app_number] => 13/914426 [patent_app_country] => US [patent_app_date] => 2013-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4946 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13914426 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10960873 [patent_doc_number] => 20140363903 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-11 [patent_title] => 'SUBSTRATE TREATING APPARATUS AND METHOD OF TREATING SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/914098 [patent_app_country] => US [patent_app_date] => 2013-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 15528 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13914098 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9154206 [patent_doc_number] => 08587113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-19 [patent_title] => 'Thermal plate with planar thermal zones for semiconductor processing' [patent_app_type] => utility [patent_app_number] => 13/912907 [patent_app_country] => US [patent_app_date] => 2013-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4690 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13912907 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9711321 [patent_doc_number] => 08835895 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-16 [patent_title] => 'Memory device and fabrication process thereof' [patent_app_type] => utility [patent_app_number] => 13/908680 [patent_app_country] => US [patent_app_date] => 2013-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 25 [patent_no_of_words] => 10613 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13908680 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9178214 [patent_doc_number] => 20130320199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-05 [patent_title] => 'OPTICALLY CONTROLLED SILICON CARBIDE AND RELATED WIDE-BANDGAP TRANSISTORS AND THYRISTORS' [patent_app_type] => utility [patent_app_number] => 13/908453 [patent_app_country] => US [patent_app_date] => 2013-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9278 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13908453 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9576000 [patent_doc_number] => 08766417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Integrated circuit chip with reduced IR drop' [patent_app_type] => utility [patent_app_number] => 13/907981 [patent_app_country] => US [patent_app_date] => 2013-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4120 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13907981 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9262775 [patent_doc_number] => 20130344704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-26 [patent_title] => 'ENHANCEMENT IN UV CURING EFFICIENCY USING OXYGEN-DOPED PURGE FOR ULTRA LOW-K DIELECTRIC FILM' [patent_app_type] => utility [patent_app_number] => 13/904468 [patent_app_country] => US [patent_app_date] => 2013-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6067 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13904468 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9414219 [patent_doc_number] => 08698256 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-15 [patent_title] => 'MEMS process and device' [patent_app_type] => utility [patent_app_number] => 13/902344 [patent_app_country] => US [patent_app_date] => 2013-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5073 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13902344 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9174519 [patent_doc_number] => 20130316504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-28 [patent_title] => 'Semiconductor Device and Method of Fabricating Same' [patent_app_type] => utility [patent_app_number] => 13/891921 [patent_app_country] => US [patent_app_date] => 2013-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6350 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13891921 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10831188 [patent_doc_number] => 08859355 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-10-14 [patent_title] => 'Method to make dual material finFET on same substrate' [patent_app_type] => utility [patent_app_number] => 13/887766 [patent_app_country] => US [patent_app_date] => 2013-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5809 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13887766 [rel_patent_id] =>[rel_patent_doc_number] =>)