Search

Telly D. Green

Examiner (ID: 7164, Phone: (571)270-3204 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2898, 2809, 2822
Total Applications
1671
Issued Applications
1353
Pending Applications
119
Abandoned Applications
249

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7417352 [patent_doc_number] => 20040107329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-03 [patent_title] => 'Memory pool configuration system' [patent_app_type] => new [patent_app_number] => 10/307840 [patent_app_country] => US [patent_app_date] => 2002-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5761 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20040107329.pdf [firstpage_image] =>[orig_patent_app_number] => 10307840 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/307840
Memory pool configuration system Dec 1, 2002 Issued
Array ( [id] => 7417357 [patent_doc_number] => 20040107330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-03 [patent_title] => 'Read/modify/write registers' [patent_app_type] => new [patent_app_number] => 10/307625 [patent_app_country] => US [patent_app_date] => 2002-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4185 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20040107330.pdf [firstpage_image] =>[orig_patent_app_number] => 10307625 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/307625
Read/modify/write registers Dec 1, 2002 Issued
Array ( [id] => 6857695 [patent_doc_number] => 20030131196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'Cache memory capable of selecting size thereof and processor chip having the same' [patent_app_type] => new [patent_app_number] => 10/307864 [patent_app_country] => US [patent_app_date] => 2002-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7869 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20030131196.pdf [firstpage_image] =>[orig_patent_app_number] => 10307864 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/307864
Cache memory capable of selecting size thereof and processor chip having the same Dec 1, 2002 Issued
Array ( [id] => 7417321 [patent_doc_number] => 20040107324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-03 [patent_title] => 'DDR SDRAM memory controller with multiple dependency request architecture and intelligent requestor interface' [patent_app_type] => new [patent_app_number] => 10/307666 [patent_app_country] => US [patent_app_date] => 2002-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8304 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20040107324.pdf [firstpage_image] =>[orig_patent_app_number] => 10307666 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/307666
DDR SDRAM memory controller with multiple dependency request architecture and intelligent requestor interface Dec 1, 2002 Issued
Array ( [id] => 1024818 [patent_doc_number] => 06889288 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-03 [patent_title] => 'Reducing data copy operations for writing data from a network to storage of a cached data storage system by organizing cache blocks as linked lists of data fragments' [patent_app_type] => utility [patent_app_number] => 10/308159 [patent_app_country] => US [patent_app_date] => 2002-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 7126 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/889/06889288.pdf [firstpage_image] =>[orig_patent_app_number] => 10308159 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/308159
Reducing data copy operations for writing data from a network to storage of a cached data storage system by organizing cache blocks as linked lists of data fragments Dec 1, 2002 Issued
Array ( [id] => 943538 [patent_doc_number] => 06970981 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-29 [patent_title] => 'Method and apparatus to maintain consistency between an object store and a plurality of caches utilizing transactional updates to data caches' [patent_app_type] => utility [patent_app_number] => 10/305759 [patent_app_country] => US [patent_app_date] => 2002-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5941 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/970/06970981.pdf [firstpage_image] =>[orig_patent_app_number] => 10305759 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/305759
Method and apparatus to maintain consistency between an object store and a plurality of caches utilizing transactional updates to data caches Nov 26, 2002 Issued
Array ( [id] => 1180996 [patent_doc_number] => 06754778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-22 [patent_title] => 'Memory controller and a cache for accessing a main memory, and a system and a method for controlling the main memory' [patent_app_type] => B2 [patent_app_number] => 10/295855 [patent_app_country] => US [patent_app_date] => 2002-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 8008 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/754/06754778.pdf [firstpage_image] =>[orig_patent_app_number] => 10295855 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/295855
Memory controller and a cache for accessing a main memory, and a system and a method for controlling the main memory Nov 17, 2002 Issued
Array ( [id] => 7476943 [patent_doc_number] => 20040098541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-20 [patent_title] => 'System and method for implementing an adaptive replacement cache policy' [patent_app_type] => new [patent_app_number] => 10/295507 [patent_app_country] => US [patent_app_date] => 2002-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9403 [patent_no_of_claims] => 62 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20040098541.pdf [firstpage_image] =>[orig_patent_app_number] => 10295507 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/295507
System and method for implementing an adaptive replacement cache policy Nov 13, 2002 Issued
Array ( [id] => 7373841 [patent_doc_number] => 20040093457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-13 [patent_title] => 'Mapping addresses to memory banks based on at least one mathematical relationship' [patent_app_type] => new [patent_app_number] => 10/292144 [patent_app_country] => US [patent_app_date] => 2002-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7167 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20040093457.pdf [firstpage_image] =>[orig_patent_app_number] => 10292144 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/292144
Mapping addresses to memory banks based on at least one mathematical relationship Nov 11, 2002 Issued
Array ( [id] => 1070977 [patent_doc_number] => 06845440 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-18 [patent_title] => 'System for preventing memory usage conflicts when generating and merging computer architecture test cases' [patent_app_type] => utility [patent_app_number] => 10/291936 [patent_app_country] => US [patent_app_date] => 2002-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2097 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/845/06845440.pdf [firstpage_image] =>[orig_patent_app_number] => 10291936 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/291936
System for preventing memory usage conflicts when generating and merging computer architecture test cases Nov 10, 2002 Issued
Array ( [id] => 7373859 [patent_doc_number] => 20040093464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-13 [patent_title] => 'Integrated sector format-error correction code system and method for efficient writing in a disk array system' [patent_app_type] => new [patent_app_number] => 10/291087 [patent_app_country] => US [patent_app_date] => 2002-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3714 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20040093464.pdf [firstpage_image] =>[orig_patent_app_number] => 10291087 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/291087
Integrated sector format-error correction code system and method for efficient writing in a disk array system Nov 8, 2002 Issued
Array ( [id] => 7271274 [patent_doc_number] => 20040059792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'Method for processing data, a data processing system and a portable terminal' [patent_app_type] => new [patent_app_number] => 10/286479 [patent_app_country] => US [patent_app_date] => 2002-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7509 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20040059792.pdf [firstpage_image] =>[orig_patent_app_number] => 10286479 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/286479
Method for processing data, a data processing system and a portable terminal with data processing capability Oct 31, 2002 Issued
Array ( [id] => 933313 [patent_doc_number] => 06981092 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-27 [patent_title] => 'Automatic media readying system and method' [patent_app_type] => utility [patent_app_number] => 10/284673 [patent_app_country] => US [patent_app_date] => 2002-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3775 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/981/06981092.pdf [firstpage_image] =>[orig_patent_app_number] => 10284673 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/284673
Automatic media readying system and method Oct 30, 2002 Issued
Array ( [id] => 7214292 [patent_doc_number] => 20040088475 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Memory device with column select being variably delayed' [patent_app_type] => new [patent_app_number] => 10/285027 [patent_app_country] => US [patent_app_date] => 2002-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5594 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20040088475.pdf [firstpage_image] =>[orig_patent_app_number] => 10285027 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/285027
Memory device with column select being variably delayed Oct 30, 2002 Issued
Array ( [id] => 877540 [patent_doc_number] => 07363459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-22 [patent_title] => 'System and method of optimizing memory usage with data lifetimes' [patent_app_type] => utility [patent_app_number] => 10/284844 [patent_app_country] => US [patent_app_date] => 2002-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 7220 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/363/07363459.pdf [firstpage_image] =>[orig_patent_app_number] => 10284844 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/284844
System and method of optimizing memory usage with data lifetimes Oct 30, 2002 Issued
Array ( [id] => 6871577 [patent_doc_number] => 20030084267 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => 'Device for accessing registered circuit units' [patent_app_type] => new [patent_app_number] => 10/284774 [patent_app_country] => US [patent_app_date] => 2002-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4825 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20030084267.pdf [firstpage_image] =>[orig_patent_app_number] => 10284774 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/284774
Device for accessing registered circuit units Oct 30, 2002 Issued
Array ( [id] => 1011388 [patent_doc_number] => 06901491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-31 [patent_title] => 'Method and apparatus for integration of communication links with a remote direct memory access protocol' [patent_app_type] => utility [patent_app_number] => 10/272784 [patent_app_country] => US [patent_app_date] => 2002-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3085 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/901/06901491.pdf [firstpage_image] =>[orig_patent_app_number] => 10272784 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/272784
Method and apparatus for integration of communication links with a remote direct memory access protocol Oct 15, 2002 Issued
Array ( [id] => 7233009 [patent_doc_number] => 20040073624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-15 [patent_title] => 'Apparatus and method to manage and copy computer files' [patent_app_type] => new [patent_app_number] => 10/272732 [patent_app_country] => US [patent_app_date] => 2002-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4988 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20040073624.pdf [firstpage_image] =>[orig_patent_app_number] => 10272732 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/272732
Apparatus and method to manage and copy computer files Oct 14, 2002 Issued
Array ( [id] => 7455214 [patent_doc_number] => 20040052211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-18 [patent_title] => 'Per CoS memory partitioning' [patent_app_type] => new [patent_app_number] => 10/245289 [patent_app_country] => US [patent_app_date] => 2002-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3635 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20040052211.pdf [firstpage_image] =>[orig_patent_app_number] => 10245289 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/245289
Per CoS memory partitioning Sep 17, 2002 Issued
Array ( [id] => 7473399 [patent_doc_number] => 20040054758 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-18 [patent_title] => 'Software application domain and storage domain constraining process and method' [patent_app_type] => new [patent_app_number] => 10/244825 [patent_app_country] => US [patent_app_date] => 2002-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 13587 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20040054758.pdf [firstpage_image] =>[orig_patent_app_number] => 10244825 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/244825
Software application domain and storage domain constraining process and method Sep 15, 2002 Issued
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