
Telly D. Green
Examiner (ID: 7164, Phone: (571)270-3204 , Office: P/2822 )
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2898, 2809, 2822 |
| Total Applications | 1671 |
| Issued Applications | 1353 |
| Pending Applications | 119 |
| Abandoned Applications | 249 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1210329
[patent_doc_number] => 06718426
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[patent_kind] => B2
[patent_issue_date] => 2004-04-06
[patent_title] => 'Cache memory apparatus and central processor, hand-held device and arithmetic processor using the same'
[patent_app_type] => B2
[patent_app_number] => 09/791855
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Array
(
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[patent_issue_date] => 2004-11-02
[patent_title] => 'Methods and apparatus for accessing trace data'
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Array
(
[id] => 6888028
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[patent_kind] => A1
[patent_issue_date] => 2001-07-19
[patent_title] => 'Adaptive memory control'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/788114 | Adaptive memory control | Feb 15, 2001 | Issued |
Array
(
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[patent_issue_date] => 2003-11-18
[patent_title] => 'Methods for predicting cache memory performance in a proposed computer system'
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Array
(
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[patent_title] => 'Efficient memory allocation scheme for data collection'
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Array
(
[id] => 716342
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[patent_kind] => B2
[patent_issue_date] => 2006-06-06
[patent_title] => 'Non-zero null reference to speed up write barrier checking for garbage collection'
[patent_app_type] => utility
[patent_app_number] => 10/203060
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/203060 | Non-zero null reference to speed up write barrier checking for garbage collection | Feb 6, 2001 | Issued |
Array
(
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[patent_title] => 'Directed least recently used cache replacement method'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/777365 | Directed least recently used cache replacement method | Feb 4, 2001 | Abandoned |
Array
(
[id] => 6648531
[patent_doc_number] => 20020087819
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[patent_kind] => A1
[patent_issue_date] => 2002-07-04
[patent_title] => 'SDR and DDR conversion device and associated interface card, main board and memory module interface'
[patent_app_type] => new
[patent_app_number] => 09/777228
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/777228 | SDR and DDR conversion device and associated interface card, main board and memory module interface | Feb 4, 2001 | Issued |
Array
(
[id] => 1377072
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[patent_title] => 'File mapping system and related techniques'
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Array
(
[id] => 6283158
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[patent_title] => 'Method for fast wake-up of a flash memory system'
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Array
(
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Array
(
[id] => 6283174
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/775607 | Memory module control and status | Feb 4, 2001 | Abandoned |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/775783 | Streaming data from multiple sources according to storage location information | Feb 1, 2001 | Issued |
Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/764502 | Memory device with command buffer that allows internal command buffer jumps | Jan 16, 2001 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/752128 | System for identifying memory requests as noncacheable or reduce cache coherence directory lookups and bus snoops | Dec 28, 2000 | Issued |
Array
(
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Array
(
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Array
(
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[patent_title] => 'System and method for populating cache servers with popular media contents'
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| 09/720678 | Memory control unit | Dec 28, 2000 | Abandoned |