Search

Telly D. Green

Examiner (ID: 7164, Phone: (571)270-3204 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2898, 2809, 2822
Total Applications
1671
Issued Applications
1353
Pending Applications
119
Abandoned Applications
249

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1210329 [patent_doc_number] => 06718426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-06 [patent_title] => 'Cache memory apparatus and central processor, hand-held device and arithmetic processor using the same' [patent_app_type] => B2 [patent_app_number] => 09/791855 [patent_app_country] => US [patent_app_date] => 2001-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 6380 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/718/06718426.pdf [firstpage_image] =>[orig_patent_app_number] => 09791855 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/791855
Cache memory apparatus and central processor, hand-held device and arithmetic processor using the same Feb 25, 2001 Issued
Array ( [id] => 1109935 [patent_doc_number] => 06813731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-02 [patent_title] => 'Methods and apparatus for accessing trace data' [patent_app_type] => B2 [patent_app_number] => 09/794696 [patent_app_country] => US [patent_app_date] => 2001-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 14734 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/813/06813731.pdf [firstpage_image] =>[orig_patent_app_number] => 09794696 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/794696
Methods and apparatus for accessing trace data Feb 25, 2001 Issued
Array ( [id] => 6888028 [patent_doc_number] => 20010009022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-07-19 [patent_title] => 'Adaptive memory control' [patent_app_type] => new-utility [patent_app_number] => 09/788114 [patent_app_country] => US [patent_app_date] => 2001-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3213 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20010009022.pdf [firstpage_image] =>[orig_patent_app_number] => 09788114 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/788114
Adaptive memory control Feb 15, 2001 Issued
Array ( [id] => 1284603 [patent_doc_number] => 06651153 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-18 [patent_title] => 'Methods for predicting cache memory performance in a proposed computer system' [patent_app_type] => B1 [patent_app_number] => 09/784933 [patent_app_country] => US [patent_app_date] => 2001-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5243 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/651/06651153.pdf [firstpage_image] =>[orig_patent_app_number] => 09784933 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/784933
Methods for predicting cache memory performance in a proposed computer system Feb 15, 2001 Issued
Array ( [id] => 1083047 [patent_doc_number] => 06836861 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-28 [patent_title] => 'Efficient memory allocation scheme for data collection' [patent_app_type] => B2 [patent_app_number] => 09/785794 [patent_app_country] => US [patent_app_date] => 2001-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2719 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/836/06836861.pdf [firstpage_image] =>[orig_patent_app_number] => 09785794 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/785794
Efficient memory allocation scheme for data collection Feb 15, 2001 Issued
Array ( [id] => 716342 [patent_doc_number] => 07058669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-06 [patent_title] => 'Non-zero null reference to speed up write barrier checking for garbage collection' [patent_app_type] => utility [patent_app_number] => 10/203060 [patent_app_country] => US [patent_app_date] => 2001-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2801 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/058/07058669.pdf [firstpage_image] =>[orig_patent_app_number] => 10203060 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/203060
Non-zero null reference to speed up write barrier checking for garbage collection Feb 6, 2001 Issued
Array ( [id] => 6484796 [patent_doc_number] => 20020152361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-17 [patent_title] => 'Directed least recently used cache replacement method' [patent_app_type] => new [patent_app_number] => 09/777365 [patent_app_country] => US [patent_app_date] => 2001-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4672 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20020152361.pdf [firstpage_image] =>[orig_patent_app_number] => 09777365 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/777365
Directed least recently used cache replacement method Feb 4, 2001 Abandoned
Array ( [id] => 6648531 [patent_doc_number] => 20020087819 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-04 [patent_title] => 'SDR and DDR conversion device and associated interface card, main board and memory module interface' [patent_app_type] => new [patent_app_number] => 09/777228 [patent_app_country] => US [patent_app_date] => 2001-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3153 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20020087819.pdf [firstpage_image] =>[orig_patent_app_number] => 09777228 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/777228
SDR and DDR conversion device and associated interface card, main board and memory module interface Feb 4, 2001 Issued
Array ( [id] => 1377072 [patent_doc_number] => 06578121 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-10 [patent_title] => 'File mapping system and related techniques' [patent_app_type] => B1 [patent_app_number] => 09/777977 [patent_app_country] => US [patent_app_date] => 2001-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 27 [patent_no_of_words] => 12611 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/578/06578121.pdf [firstpage_image] =>[orig_patent_app_number] => 09777977 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/777977
File mapping system and related techniques Feb 4, 2001 Issued
Array ( [id] => 6283158 [patent_doc_number] => 20020108014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-08 [patent_title] => 'Method for fast wake-up of a flash memory system' [patent_app_type] => new [patent_app_number] => 09/775499 [patent_app_country] => US [patent_app_date] => 2001-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2368 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20020108014.pdf [firstpage_image] =>[orig_patent_app_number] => 09775499 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/775499
Method for fast wake-up of a flash memory system Feb 4, 2001 Issued
Array ( [id] => 1431866 [patent_doc_number] => 06516380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-04 [patent_title] => 'System and method for a log-based non-volatile write cache in a storage controller' [patent_app_type] => B2 [patent_app_number] => 09/776982 [patent_app_country] => US [patent_app_date] => 2001-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6272 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/516/06516380.pdf [firstpage_image] =>[orig_patent_app_number] => 09776982 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/776982
System and method for a log-based non-volatile write cache in a storage controller Feb 4, 2001 Issued
Array ( [id] => 6283174 [patent_doc_number] => 20020108018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-08 [patent_title] => 'Memory module control and status' [patent_app_type] => new [patent_app_number] => 09/775607 [patent_app_country] => US [patent_app_date] => 2001-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1796 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20020108018.pdf [firstpage_image] =>[orig_patent_app_number] => 09775607 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/775607
Memory module control and status Feb 4, 2001 Abandoned
Array ( [id] => 6889847 [patent_doc_number] => 20010025302 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-27 [patent_title] => 'Data processing system, device, and method, and program storage medium' [patent_app_type] => new [patent_app_number] => 09/775783 [patent_app_country] => US [patent_app_date] => 2001-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5114 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20010025302.pdf [firstpage_image] =>[orig_patent_app_number] => 09775783 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/775783
Streaming data from multiple sources according to storage location information Feb 1, 2001 Issued
Array ( [id] => 5990393 [patent_doc_number] => 20020099833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-25 [patent_title] => 'Cache coherency mechanism using arbitration masks' [patent_app_type] => new [patent_app_number] => 09/768418 [patent_app_country] => US [patent_app_date] => 2001-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3799 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20020099833.pdf [firstpage_image] =>[orig_patent_app_number] => 09768418 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/768418
Cache coherency mechanism using arbitration masks Jan 23, 2001 Issued
Array ( [id] => 6973274 [patent_doc_number] => 20010003512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-14 [patent_title] => 'Memory device with command buffer' [patent_app_type] => new-utility [patent_app_number] => 09/764502 [patent_app_country] => US [patent_app_date] => 2001-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4277 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20010003512.pdf [firstpage_image] =>[orig_patent_app_number] => 09764502 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/764502
Memory device with command buffer that allows internal command buffer jumps Jan 16, 2001 Issued
Array ( [id] => 1580356 [patent_doc_number] => 06470429 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-22 [patent_title] => 'System for identifying memory requests as noncacheable or reduce cache coherence directory lookups and bus snoops' [patent_app_type] => B1 [patent_app_number] => 09/752128 [patent_app_country] => US [patent_app_date] => 2000-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4076 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/470/06470429.pdf [firstpage_image] =>[orig_patent_app_number] => 09752128 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/752128
System for identifying memory requests as noncacheable or reduce cache coherence directory lookups and bus snoops Dec 28, 2000 Issued
Array ( [id] => 940462 [patent_doc_number] => 06973556 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-06 [patent_title] => 'Data element including metadata that includes data management information for managing the data element' [patent_app_type] => utility [patent_app_number] => 09/751641 [patent_app_country] => US [patent_app_date] => 2000-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3550 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/973/06973556.pdf [firstpage_image] =>[orig_patent_app_number] => 09751641 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/751641
Data element including metadata that includes data management information for managing the data element Dec 28, 2000 Issued
Array ( [id] => 1271855 [patent_doc_number] => 06662276 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-09 [patent_title] => 'Storing directory information for non uniform memory architecture systems using processor cache' [patent_app_type] => B2 [patent_app_number] => 09/751579 [patent_app_country] => US [patent_app_date] => 2000-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5347 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/662/06662276.pdf [firstpage_image] =>[orig_patent_app_number] => 09751579 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/751579
Storing directory information for non uniform memory architecture systems using processor cache Dec 28, 2000 Issued
Array ( [id] => 6648323 [patent_doc_number] => 20020087797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-04 [patent_title] => 'System and method for populating cache servers with popular media contents' [patent_app_type] => new [patent_app_number] => 09/751790 [patent_app_country] => US [patent_app_date] => 2000-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4902 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20020087797.pdf [firstpage_image] =>[orig_patent_app_number] => 09751790 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/751790
System and method for populating cache servers with popular media contents Dec 28, 2000 Issued
09/720678 Memory control unit Dec 28, 2000 Abandoned
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