Search

Telly D. Green

Examiner (ID: 7164, Phone: (571)270-3204 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2898, 2809, 2822
Total Applications
1671
Issued Applications
1353
Pending Applications
119
Abandoned Applications
249

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4031978 [patent_doc_number] => 05881312 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Memory transfer apparatus and method useful within a pattern recognition system' [patent_app_type] => 1 [patent_app_number] => 8/762546 [patent_app_country] => US [patent_app_date] => 1996-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 30547 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/881/05881312.pdf [firstpage_image] =>[orig_patent_app_number] => 762546 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/762546
Memory transfer apparatus and method useful within a pattern recognition system Dec 8, 1996 Issued
Array ( [id] => 3897914 [patent_doc_number] => 05765182 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Interleaving memory on separate boards' [patent_app_type] => 1 [patent_app_number] => 8/762309 [patent_app_country] => US [patent_app_date] => 1996-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4761 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 325 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/765/05765182.pdf [firstpage_image] =>[orig_patent_app_number] => 762309 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/762309
Interleaving memory on separate boards Dec 8, 1996 Issued
Array ( [id] => 3802362 [patent_doc_number] => 05841699 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Storage device and method to detect its degradation' [patent_app_type] => 1 [patent_app_number] => 8/760558 [patent_app_country] => US [patent_app_date] => 1996-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 9922 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/841/05841699.pdf [firstpage_image] =>[orig_patent_app_number] => 760558 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/760558
Storage device and method to detect its degradation Dec 3, 1996 Issued
Array ( [id] => 3798660 [patent_doc_number] => 05809563 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Method and apparatus utilizing a region based page table walk bit' [patent_app_type] => 1 [patent_app_number] => 8/747943 [patent_app_country] => US [patent_app_date] => 1996-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3391 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/809/05809563.pdf [firstpage_image] =>[orig_patent_app_number] => 747943 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/747943
Method and apparatus utilizing a region based page table walk bit Nov 11, 1996 Issued
Array ( [id] => 3955466 [patent_doc_number] => 05940872 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Software and hardware-managed translation lookaside buffer' [patent_app_type] => 1 [patent_app_number] => 8/742467 [patent_app_country] => US [patent_app_date] => 1996-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4661 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/940/05940872.pdf [firstpage_image] =>[orig_patent_app_number] => 742467 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/742467
Software and hardware-managed translation lookaside buffer Oct 31, 1996 Issued
Array ( [id] => 3922936 [patent_doc_number] => 05752272 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-12 [patent_title] => 'Memory access control device with prefetch and read out block length control functions' [patent_app_type] => 1 [patent_app_number] => 8/729319 [patent_app_country] => US [patent_app_date] => 1996-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 8905 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/752/05752272.pdf [firstpage_image] =>[orig_patent_app_number] => 729319 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/729319
Memory access control device with prefetch and read out block length control functions Oct 14, 1996 Issued
Array ( [id] => 3947433 [patent_doc_number] => 05953748 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Processor with an efficient translation lookaside buffer which uses previous address computation results' [patent_app_type] => 1 [patent_app_number] => 8/732862 [patent_app_country] => US [patent_app_date] => 1996-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2807 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/953/05953748.pdf [firstpage_image] =>[orig_patent_app_number] => 732862 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/732862
Processor with an efficient translation lookaside buffer which uses previous address computation results Oct 14, 1996 Issued
Array ( [id] => 4037132 [patent_doc_number] => 05883842 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'Memory card having block erasure type memory units which are used even when partially defective' [patent_app_type] => 1 [patent_app_number] => 8/732818 [patent_app_country] => US [patent_app_date] => 1996-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4480 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/883/05883842.pdf [firstpage_image] =>[orig_patent_app_number] => 732818 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/732818
Memory card having block erasure type memory units which are used even when partially defective Oct 14, 1996 Issued
Array ( [id] => 4201330 [patent_doc_number] => RE036482 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Data processor and data processing system and method for accessing a dynamic type memory using an address multiplexing system' [patent_app_type] => 2 [patent_app_number] => 8/729132 [patent_app_country] => US [patent_app_date] => 1996-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 11013 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 41 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/036/RE036482.pdf [firstpage_image] =>[orig_patent_app_number] => 729132 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/729132
Data processor and data processing system and method for accessing a dynamic type memory using an address multiplexing system Oct 10, 1996 Issued
Array ( [id] => 3913038 [patent_doc_number] => 05835927 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-10 [patent_title] => 'Special test modes for a page buffer shared resource in a memory device' [patent_app_type] => 1 [patent_app_number] => 8/719583 [patent_app_country] => US [patent_app_date] => 1996-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 7049 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/835/05835927.pdf [firstpage_image] =>[orig_patent_app_number] => 719583 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/719583
Special test modes for a page buffer shared resource in a memory device Sep 24, 1996 Issued
Array ( [id] => 3897824 [patent_doc_number] => 05805877 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'Data processor with branch target address cache and method of operation' [patent_app_type] => 1 [patent_app_number] => 8/718027 [patent_app_country] => US [patent_app_date] => 1996-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6698 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/805/05805877.pdf [firstpage_image] =>[orig_patent_app_number] => 718027 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/718027
Data processor with branch target address cache and method of operation Sep 22, 1996 Issued
08/710893 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING MEANS FOR SELECTIVE TRANSFER OF MEMORY BLOCK CONTENTS AND FOR CHAINING TOGETHER UNUSED MEMORY BLOCKS Sep 22, 1996 Abandoned
Array ( [id] => 4042201 [patent_doc_number] => 05903738 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-11 [patent_title] => 'Method and apparatus for performing bus transactions in a computer system' [patent_app_type] => 1 [patent_app_number] => 8/715049 [patent_app_country] => US [patent_app_date] => 1996-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 9448 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/903/05903738.pdf [firstpage_image] =>[orig_patent_app_number] => 715049 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/715049
Method and apparatus for performing bus transactions in a computer system Sep 16, 1996 Issued
Array ( [id] => 3974593 [patent_doc_number] => 05937186 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Asynchronous interrupt safing of prologue portions of computer programs' [patent_app_type] => 1 [patent_app_number] => 8/714494 [patent_app_country] => US [patent_app_date] => 1996-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 8233 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 443 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/937/05937186.pdf [firstpage_image] =>[orig_patent_app_number] => 714494 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/714494
Asynchronous interrupt safing of prologue portions of computer programs Sep 15, 1996 Issued
Array ( [id] => 3938179 [patent_doc_number] => 05915266 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-22 [patent_title] => 'Processor core which provides a linear extension of an addressable memory space' [patent_app_type] => 1 [patent_app_number] => 8/708786 [patent_app_country] => US [patent_app_date] => 1996-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 3651 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/915/05915266.pdf [firstpage_image] =>[orig_patent_app_number] => 708786 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/708786
Processor core which provides a linear extension of an addressable memory space Sep 8, 1996 Issued
Array ( [id] => 4019501 [patent_doc_number] => 05860094 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'System for protecting information stored on physical media' [patent_app_type] => 1 [patent_app_number] => 8/709149 [patent_app_country] => US [patent_app_date] => 1996-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2084 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/860/05860094.pdf [firstpage_image] =>[orig_patent_app_number] => 709149 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/709149
System for protecting information stored on physical media Sep 5, 1996 Issued
Array ( [id] => 4046006 [patent_doc_number] => 05856972 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-05 [patent_title] => 'Duplicate message detection method and apparatus' [patent_app_type] => 1 [patent_app_number] => 8/706683 [patent_app_country] => US [patent_app_date] => 1996-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5622 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/856/05856972.pdf [firstpage_image] =>[orig_patent_app_number] => 706683 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/706683
Duplicate message detection method and apparatus Sep 5, 1996 Issued
Array ( [id] => 3993265 [patent_doc_number] => 05918063 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Data driven type information processing apparatus including plural data driven type processors and plural memories' [patent_app_type] => 1 [patent_app_number] => 8/699878 [patent_app_country] => US [patent_app_date] => 1996-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 8921 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/918/05918063.pdf [firstpage_image] =>[orig_patent_app_number] => 699878 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/699878
Data driven type information processing apparatus including plural data driven type processors and plural memories Aug 19, 1996 Issued
Array ( [id] => 4020192 [patent_doc_number] => 05860140 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Circuit and method for learning attributes of computer memory' [patent_app_type] => 1 [patent_app_number] => 8/698821 [patent_app_country] => US [patent_app_date] => 1996-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3839 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/860/05860140.pdf [firstpage_image] =>[orig_patent_app_number] => 698821 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/698821
Circuit and method for learning attributes of computer memory Aug 15, 1996 Issued
Array ( [id] => 4020246 [patent_doc_number] => 05860144 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Addressing method and system for providing access of a very large size physical memory buffer to a number of processes' [patent_app_type] => 1 [patent_app_number] => 8/695027 [patent_app_country] => US [patent_app_date] => 1996-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10585 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/860/05860144.pdf [firstpage_image] =>[orig_patent_app_number] => 695027 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/695027
Addressing method and system for providing access of a very large size physical memory buffer to a number of processes Aug 8, 1996 Issued
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