| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3826255
[patent_doc_number] => 05812559
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-22
[patent_title] => 'Controlling method and apparatus for examination of multiport RAM(s)'
[patent_app_type] => 1
[patent_app_number] => 7/949705
[patent_app_country] => US
[patent_app_date] => 1992-09-23
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[firstpage_image] =>[orig_patent_app_number] => 949705
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/949705 | Controlling method and apparatus for examination of multiport RAM(s) | Sep 22, 1992 | Issued |
Array
(
[id] => 3456844
[patent_doc_number] => 05388244
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-02-07
[patent_title] => 'Controls for initial diversion of page-frame logical content as part of dynamic virtual-to-real translation of a virtual page address'
[patent_app_type] => 1
[patent_app_number] => 7/946504
[patent_app_country] => US
[patent_app_date] => 1992-09-17
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[pdf_file] => patents/05/388/05388244.pdf
[firstpage_image] =>[orig_patent_app_number] => 946504
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/946504 | Controls for initial diversion of page-frame logical content as part of dynamic virtual-to-real translation of a virtual page address | Sep 16, 1992 | Issued |
Array
(
[id] => 2973914
[patent_doc_number] => 05265061
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-11-23
[patent_title] => 'Apparatus for preventing glitch for semiconductor non-volatile memory device'
[patent_app_type] => 1
[patent_app_number] => 7/943145
[patent_app_country] => US
[patent_app_date] => 1992-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => patents/05/265/05265061.pdf
[firstpage_image] =>[orig_patent_app_number] => 943145
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/943145 | Apparatus for preventing glitch for semiconductor non-volatile memory device | Sep 9, 1992 | Issued |
| 07/938582 | SEMICONDUCTOR MEMORY DEVICE AND DATA TRANSFERRING STRUCTURE AND METHOD THEREIN | Sep 1, 1992 | Abandoned |
| 07/933972 | CIRCUIT AND METHOD FOR TWO STAGE REDUNDANCY DECODING | Aug 23, 1992 | Abandoned |
Array
(
[id] => 2905196
[patent_doc_number] => 05241504
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-31
[patent_title] => 'Integrated memory comprising a sense amplifier'
[patent_app_type] => 1
[patent_app_number] => 7/927781
[patent_app_country] => US
[patent_app_date] => 1992-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_no_of_words] => 1669
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[pdf_file] => patents/05/241/05241504.pdf
[firstpage_image] =>[orig_patent_app_number] => 927781
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/927781 | Integrated memory comprising a sense amplifier | Aug 9, 1992 | Issued |
| 07/926355 | MEMORY SYSTEM FOR PROTECTING THE CONTENTS OF A NON-VOLATILE MEMORY | Aug 5, 1992 | Abandoned |
Array
(
[id] => 3532052
[patent_doc_number] => 05530821
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-25
[patent_title] => 'Method and apparatus including independent virtual address translation'
[patent_app_type] => 1
[patent_app_number] => 7/921225
[patent_app_country] => US
[patent_app_date] => 1992-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/05/530/05530821.pdf
[firstpage_image] =>[orig_patent_app_number] => 921225
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/921225 | Method and apparatus including independent virtual address translation | Jul 28, 1992 | Issued |
Array
(
[id] => 3602687
[patent_doc_number] => 05488707
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-30
[patent_title] => 'Apparatus for predicting overlapped storage operands for move character'
[patent_app_type] => 1
[patent_app_number] => 7/920941
[patent_app_country] => US
[patent_app_date] => 1992-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] => patents/05/488/05488707.pdf
[firstpage_image] =>[orig_patent_app_number] => 920941
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/920941 | Apparatus for predicting overlapped storage operands for move character | Jul 27, 1992 | Issued |
| 07/917872 | TRIPLE REGISTER RISC DIGITAL SIGNAL PROCESSOR | Jul 22, 1992 | Abandoned |
| 07/918129 | ELECTRONIC APPARATUS FEATURING A PLURALITY OF SELECTABLE MEMORIES | Jul 22, 1992 | Abandoned |
Array
(
[id] => 2955748
[patent_doc_number] => 05255228
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-10-19
[patent_title] => 'Semiconductor memory device with redundancy circuits'
[patent_app_type] => 1
[patent_app_number] => 7/917674
[patent_app_country] => US
[patent_app_date] => 1992-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 4234
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[pdf_file] => patents/05/255/05255228.pdf
[firstpage_image] =>[orig_patent_app_number] => 917674
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/917674 | Semiconductor memory device with redundancy circuits | Jul 21, 1992 | Issued |
Array
(
[id] => 2905066
[patent_doc_number] => 05241497
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-31
[patent_title] => 'VLSI memory with increased memory access speed, increased memory cell density and decreased parasitic capacitance'
[patent_app_type] => 1
[patent_app_number] => 7/912112
[patent_app_country] => US
[patent_app_date] => 1992-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 35
[patent_no_of_words] => 22417
[patent_no_of_claims] => 13
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[pdf_file] => patents/05/241/05241497.pdf
[firstpage_image] =>[orig_patent_app_number] => 912112
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/912112 | VLSI memory with increased memory access speed, increased memory cell density and decreased parasitic capacitance | Jul 8, 1992 | Issued |
| 07/899572 | SEMICONDUCTOR MEMORY DEVICE WITH AN IMPROVED ARRANGEMENT FOR SETTING AN INITIAL VALUE FOR A REFRESH ADDRESS COUNTER | Jun 17, 1992 | Abandoned |
Array
(
[id] => 2985479
[patent_doc_number] => 05208782
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-05-04
[patent_title] => 'Semiconductor integrated circuit device having a plurality of memory blocks and a lead on chip (LOC) arrangement'
[patent_app_type] => 1
[patent_app_number] => 7/892708
[patent_app_country] => US
[patent_app_date] => 1992-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/208/05208782.pdf
[firstpage_image] =>[orig_patent_app_number] => 892708
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/892708 | Semiconductor integrated circuit device having a plurality of memory blocks and a lead on chip (LOC) arrangement | May 28, 1992 | Issued |
| 07/888673 | FAST LOOKAHEAD CIRCUIT TO IDENTIFY AN ITEM IN A LARE BINARY SET | May 26, 1992 | Abandoned |
Array
(
[id] => 3532080
[patent_doc_number] => 05530823
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-25
[patent_title] => 'Hit enhancement circuit for page-table-look-aside-buffer'
[patent_app_type] => 1
[patent_app_number] => 7/881914
[patent_app_country] => US
[patent_app_date] => 1992-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/05/530/05530823.pdf
[firstpage_image] =>[orig_patent_app_number] => 881914
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/881914 | Hit enhancement circuit for page-table-look-aside-buffer | May 11, 1992 | Issued |
Array
(
[id] => 3460185
[patent_doc_number] => 05386528
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-31
[patent_title] => 'Address translator having a high speed data comparator'
[patent_app_type] => 1
[patent_app_number] => 7/874921
[patent_app_country] => US
[patent_app_date] => 1992-04-29
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/386/05386528.pdf
[firstpage_image] =>[orig_patent_app_number] => 874921
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/874921 | Address translator having a high speed data comparator | Apr 28, 1992 | Issued |
Array
(
[id] => 3105665
[patent_doc_number] => 05293345
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-03-08
[patent_title] => 'Semiconductor memory device having a data detection circuit with two reference potentials'
[patent_app_type] => 1
[patent_app_number] => 7/874220
[patent_app_country] => US
[patent_app_date] => 1992-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/05/293/05293345.pdf
[firstpage_image] =>[orig_patent_app_number] => 874220
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/874220 | Semiconductor memory device having a data detection circuit with two reference potentials | Apr 26, 1992 | Issued |
| 07/873613 | METHOD OF DRIVING DEVICE HAVING MIM STRUCTURE | Apr 21, 1992 | Abandoned |