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Telly D. Green

Examiner (ID: 7164, Phone: (571)270-3204 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2898, 2809, 2822
Total Applications
1671
Issued Applications
1353
Pending Applications
119
Abandoned Applications
249
Applications
StatisticsSubscription-Only

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3041284 [patent_doc_number] => 05343433 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-30 [patent_title] => 'CMOS sense amplifier' [patent_app_type] => 1 [patent_app_number] => 7/559439 [patent_app_country] => US [patent_app_date] => 1990-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4419 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/343/05343433.pdf [firstpage_image] =>[orig_patent_app_number] => 559439 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/559439 		CMOS sense amplifier Jul 25, 1990 Issued
07/557899 SCHEME FOR ELIMINATING PAGE BOUNDARY LIMITATION ON INITIAL ACCESS OF A SERIAL CONTIGUOUS ACCESS MEMORY Jul 24, 1990 Abandoned
07/551416 METHOD FOR ALLOCATING REAL PAGES TO VIRTUAL PAGES HAVING DIFFERENT PAGE SIZES THEREFROM Jul 11, 1990 Abandoned
Array ( [id] => 2796964 [patent_doc_number] => 05155703 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-13 [patent_title] => 'BiCMOS bit line load for a memory with improved reliability' [patent_app_type] => 1 [patent_app_number] => 7/548809 [patent_app_country] => US [patent_app_date] => 1990-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 7316 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/155/05155703.pdf [firstpage_image] =>[orig_patent_app_number] => 548809 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/548809 		BiCMOS bit line load for a memory with improved reliability Jul 5, 1990 Issued
Array ( [id] => 3590383 [patent_doc_number] => 05491806 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-13 [patent_title] => 'Optimized translation lookaside buffer slice having stored mask bits' [patent_app_type] => 1 [patent_app_number] => 7/543936 [patent_app_country] => US [patent_app_date] => 1990-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 8332 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/491/05491806.pdf [firstpage_image] =>[orig_patent_app_number] => 543936 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/543936 		Optimized translation lookaside buffer slice having stored mask bits Jun 25, 1990 Issued
Array ( [id] => 2881746 [patent_doc_number] => 05091884 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-02-25 [patent_title] => 'Semiconductor memory device with improved address discriminating circuit for discriminating an address assigned defective memory cell replaced with redundant memory cell' [patent_app_type] => 1 [patent_app_number] => 7/543509 [patent_app_country] => US [patent_app_date] => 1990-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4834 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/091/05091884.pdf [firstpage_image] =>[orig_patent_app_number] => 543509 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/543509 		Semiconductor memory device with improved address discriminating circuit for discriminating an address assigned defective memory cell replaced with redundant memory cell Jun 25, 1990 Issued
07/542065 ELECTRONIC APPARATUS FEATURING A PLURALITY OF SELECTABLE MEMORIES Jun 21, 1990 Abandoned
07/538185 A VLSI MEMORY WITH INCREASED MEMORY ACCESS SPEED, INCREASED MEMORY CELL DENSITY AND DECREASED PARASITIC CAPACITANCE Jun 13, 1990 Abandoned
07/536739 SEMICONDUCTOR MEMORY DEVICE HAVING A DATA DETECTION CIRCUIT WITH TWO REFERENCE POTENTIALS Jun 11, 1990 Abandoned
07/534392 METHOD AND APPARATUS FOR MANAGING PAGE ZERO MEMORY ACCESSES IN A MULTI-PROCESSOR SYSTEM Jun 6, 1990 Abandoned
07/534809 INTEGRATED CIRCUIT MEMORY WITH NON-BINARY ARRAY CONFIGURATION Jun 6, 1990 Abandoned
Array ( [id] => 2796746 [patent_doc_number] => 05130923 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-14 [patent_title] => 'Selective dynamic RAM address generator with provision for automatic refresh' [patent_app_type] => 1 [patent_app_number] => 7/534289 [patent_app_country] => US [patent_app_date] => 1990-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1857 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 318 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/130/05130923.pdf [firstpage_image] =>[orig_patent_app_number] => 534289 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/534289 		Selective dynamic RAM address generator with provision for automatic refresh Jun 5, 1990 Issued
07/535243 READ/WRITE MEMORY WITH SELECTIVE ROW WRITE CAPABILITY Jun 5, 1990 Abandoned
07/533640 SEMICONDUCTOR MEMORY DEVICE WHICH IS CAPABLE OF CORRECTING A BIT FAILURE Jun 4, 1990 Abandoned
Array ( [id] => 2836410 [patent_doc_number] => 05117391 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-26 [patent_title] => 'Bipolar memory cell array biasing technique with forward active PNP load cell' [patent_app_type] => 1 [patent_app_number] => 7/533220 [patent_app_country] => US [patent_app_date] => 1990-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2795 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/117/05117391.pdf [firstpage_image] =>[orig_patent_app_number] => 533220 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/533220 		Bipolar memory cell array biasing technique with forward active PNP load cell Jun 3, 1990 Issued
07/531385 MEMORY SELECTION CIRCUIT May 30, 1990 Abandoned
07/525289 INTEGRATED MEMORY HAVING A HIGH-SPEED SENSE AMPLIFIER May 16, 1990 Abandoned
Array ( [id] => 2753320 [patent_doc_number] => 05029127 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-02 [patent_title] => 'Bipolar SRAM having word lines as vertically stacked pairs of conductive lines parallelly formed with holding current lines' [patent_app_type] => 1 [patent_app_number] => 7/523389 [patent_app_country] => US [patent_app_date] => 1990-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 8936 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/029/05029127.pdf [firstpage_image] =>[orig_patent_app_number] => 523389 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/523389 		Bipolar SRAM having word lines as vertically stacked pairs of conductive lines parallelly formed with holding current lines May 14, 1990 Issued
07/520179 DATA DESCRAMBLING IN SEMICONDUCTOR MEMORY DEVICE May 7, 1990 Abandoned
07/514269 DATA SENSE CIRCUIT IN A SEMICONDUCTOR NONVOLATILE MEMORY DEVICE Apr 24, 1990 Abandoned
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