Search

Teresa M. Arroyo

Examiner (ID: 2154, Phone: (571)272-7260 , Office: P/2829 )

Most Active Art Unit
2826
Art Unit(s)
2881, 2893, 2508, 2826, 2811, 2822, 2503, 2829
Total Applications
970
Issued Applications
700
Pending Applications
80
Abandoned Applications
212

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8838962 [patent_doc_number] => 20130134589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-30 [patent_title] => 'CHIP-PACKAGE AND A METHOD FOR FORMING A CHIP-PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/304795 [patent_app_country] => US [patent_app_date] => 2011-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12705 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13304795 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/304795
Chip-package and a method for forming a chip-package Nov 27, 2011 Issued
Array ( [id] => 8838972 [patent_doc_number] => 20130134600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-30 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/305593 [patent_app_country] => US [patent_app_date] => 2011-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4009 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13305593 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/305593
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Nov 27, 2011 Abandoned
Array ( [id] => 9938103 [patent_doc_number] => 08987916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-24 [patent_title] => 'Methods and apparatus to improve reliability of isolated vias' [patent_app_type] => utility [patent_app_number] => 13/305410 [patent_app_country] => US [patent_app_date] => 2011-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4698 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13305410 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/305410
Methods and apparatus to improve reliability of isolated vias Nov 27, 2011 Issued
Array ( [id] => 8299122 [patent_doc_number] => 20120181686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-19 [patent_title] => 'METHOD OF PREPARING SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR DIE FOR SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/303938 [patent_app_country] => US [patent_app_date] => 2011-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10470 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13303938 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/303938
METHOD OF PREPARING SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR DIE FOR SEMICONDUCTOR PACKAGE Nov 22, 2011 Abandoned
Array ( [id] => 8713156 [patent_doc_number] => 08399296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Airgap micro-spring interconnect with bonded underfill seal' [patent_app_type] => utility [patent_app_number] => 13/269609 [patent_app_country] => US [patent_app_date] => 2011-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3442 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13269609 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/269609
Airgap micro-spring interconnect with bonded underfill seal Oct 8, 2011 Issued
Array ( [id] => 7728350 [patent_doc_number] => 20120012995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/137927 [patent_app_country] => US [patent_app_date] => 2011-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 16068 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20120012995.pdf [firstpage_image] =>[orig_patent_app_number] => 13137927 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/137927
Semiconductor device and heat sink with 3-dimensional thermal conductivity Sep 20, 2011 Issued
Array ( [id] => 8037181 [patent_doc_number] => 20120068324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/225843 [patent_app_country] => US [patent_app_date] => 2011-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9973 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20120068324.pdf [firstpage_image] =>[orig_patent_app_number] => 13225843 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/225843
SEMICONDUCTOR DEVICE Sep 5, 2011 Abandoned
Array ( [id] => 9639347 [patent_doc_number] => 20140217457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'LIGHT-EMITTING ELEMENT CHIP AND MANUFACTURING METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 14/117301 [patent_app_country] => US [patent_app_date] => 2011-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11593 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14117301 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/117301
LIGHT-EMITTING ELEMENT CHIP AND MANUFACTURING METHOD THEREFOR May 24, 2011 Abandoned
Array ( [id] => 9300231 [patent_doc_number] => 08648462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-11 [patent_title] => 'Semiconductor power module' [patent_app_type] => utility [patent_app_number] => 13/114475 [patent_app_country] => US [patent_app_date] => 2011-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6543 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13114475 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/114475
Semiconductor power module May 23, 2011 Issued
Array ( [id] => 8835093 [patent_doc_number] => 08450852 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-28 [patent_title] => 'Wiring substrate' [patent_app_type] => utility [patent_app_number] => 13/114417 [patent_app_country] => US [patent_app_date] => 2011-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 16443 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13114417 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/114417
Wiring substrate May 23, 2011 Issued
Array ( [id] => 7496870 [patent_doc_number] => 20110260310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-27 [patent_title] => 'QUAD FLAT NON-LEADED SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/095843 [patent_app_country] => US [patent_app_date] => 2011-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3583 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0260/20110260310.pdf [firstpage_image] =>[orig_patent_app_number] => 13095843 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/095843
Quad flat non-leaded semiconductor package and fabrication method thereof Apr 26, 2011 Issued
Array ( [id] => 8275051 [patent_doc_number] => 20120168926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-05 [patent_title] => 'High Power Semiconductor Package with Conductive Clip and Flip Chip Driver IC with Integrated Control Transistor' [patent_app_type] => utility [patent_app_number] => 13/095725 [patent_app_country] => US [patent_app_date] => 2011-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2588 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13095725 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/095725
High power semiconductor package with conductive clip and flip chip driver IC with integrated control transistor Apr 26, 2011 Issued
Array ( [id] => 7648861 [patent_doc_number] => 20110298130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'SEMICONDUCTOR DEVICES WITH THROUGH-SILICON VIAS' [patent_app_type] => utility [patent_app_number] => 13/093439 [patent_app_country] => US [patent_app_date] => 2011-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6121 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0298/20110298130.pdf [firstpage_image] =>[orig_patent_app_number] => 13093439 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/093439
SEMICONDUCTOR DEVICES WITH THROUGH-SILICON VIAS Apr 24, 2011 Abandoned
Array ( [id] => 7648860 [patent_doc_number] => 20110298129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'STACKED PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/093123 [patent_app_country] => US [patent_app_date] => 2011-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4646 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0298/20110298129.pdf [firstpage_image] =>[orig_patent_app_number] => 13093123 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/093123
Stacked package Apr 24, 2011 Issued
Array ( [id] => 9996579 [patent_doc_number] => 09041181 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-26 [patent_title] => 'Land grid array package capable of decreasing a height difference between a land and a solder resist' [patent_app_type] => utility [patent_app_number] => 13/024785 [patent_app_country] => US [patent_app_date] => 2011-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 4132 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13024785 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/024785
Land grid array package capable of decreasing a height difference between a land and a solder resist Feb 9, 2011 Issued
Array ( [id] => 10145016 [patent_doc_number] => 09177828 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'External gettering method and device' [patent_app_type] => utility [patent_app_number] => 13/024806 [patent_app_country] => US [patent_app_date] => 2011-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 5131 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13024806 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/024806
External gettering method and device Feb 9, 2011 Issued
Array ( [id] => 11411690 [patent_doc_number] => 09559001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-31 [patent_title] => 'Chip package and method for forming the same' [patent_app_type] => utility [patent_app_number] => 13/024156 [patent_app_country] => US [patent_app_date] => 2011-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 6750 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13024156 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/024156
Chip package and method for forming the same Feb 8, 2011 Issued
Array ( [id] => 6161393 [patent_doc_number] => 20110193215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/023565 [patent_app_country] => US [patent_app_date] => 2011-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5895 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20110193215.pdf [firstpage_image] =>[orig_patent_app_number] => 13023565 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/023565
SEMICONDUCTOR PACKAGE Feb 8, 2011 Abandoned
Array ( [id] => 8333256 [patent_doc_number] => 20120199960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'WIRE BONDING FOR INTERCONNECTION BETWEEN INTERPOSER AND FLIP CHIP DIE' [patent_app_type] => utility [patent_app_number] => 13/022146 [patent_app_country] => US [patent_app_date] => 2011-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3178 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13022146 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/022146
WIRE BONDING FOR INTERCONNECTION BETWEEN INTERPOSER AND FLIP CHIP DIE Feb 6, 2011 Abandoned
Array ( [id] => 8560138 [patent_doc_number] => 08334201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-18 [patent_title] => 'Semiconductor device and inspection method therefor' [patent_app_type] => utility [patent_app_number] => 12/929631 [patent_app_country] => US [patent_app_date] => 2011-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5238 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12929631 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/929631
Semiconductor device and inspection method therefor Feb 3, 2011 Issued
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