Search

Teresa M. Arroyo

Examiner (ID: 2154, Phone: (571)272-7260 , Office: P/2829 )

Most Active Art Unit
2826
Art Unit(s)
2881, 2893, 2508, 2826, 2811, 2822, 2503, 2829
Total Applications
970
Issued Applications
700
Pending Applications
80
Abandoned Applications
212

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6161410 [patent_doc_number] => 20110193224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/020126 [patent_app_country] => US [patent_app_date] => 2011-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3289 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20110193224.pdf [firstpage_image] =>[orig_patent_app_number] => 13020126 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/020126
SEMICONDUCTOR DEVICE Feb 2, 2011 Abandoned
Array ( [id] => 7571030 [patent_doc_number] => 20110266686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-03 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/020235 [patent_app_country] => US [patent_app_date] => 2011-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4560 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20110266686.pdf [firstpage_image] =>[orig_patent_app_number] => 13020235 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/020235
Semiconductor device and method of manufacturing the same Feb 2, 2011 Issued
Array ( [id] => 9876042 [patent_doc_number] => 08963315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-24 [patent_title] => 'Semiconductor device with surface electrodes' [patent_app_type] => utility [patent_app_number] => 13/019390 [patent_app_country] => US [patent_app_date] => 2011-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 68 [patent_no_of_words] => 17903 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13019390 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/019390
Semiconductor device with surface electrodes Feb 1, 2011 Issued
Array ( [id] => 6185375 [patent_doc_number] => 20110124158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'THERMAL ENHANCED UPPER AND DUAL HEAT SINK EXPOSED MOLDED LEADLESS PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/019488 [patent_app_country] => US [patent_app_date] => 2011-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3615 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20110124158.pdf [firstpage_image] =>[orig_patent_app_number] => 13019488 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/019488
Thermal enhanced upper and dual heat sink exposed molded leadless package and method Feb 1, 2011 Issued
Array ( [id] => 6161409 [patent_doc_number] => 20110193223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'SEMICONDUCTOR DEVICE, CHIP-ON-CHIP MOUNTING STRUCTURE, METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE, AND METHOD OF FORMING THE CHIP-ON-CHIP MOUNTING STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/018723 [patent_app_country] => US [patent_app_date] => 2011-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4593 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20110193223.pdf [firstpage_image] =>[orig_patent_app_number] => 13018723 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/018723
SEMICONDUCTOR DEVICE, CHIP-ON-CHIP MOUNTING STRUCTURE, METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE, AND METHOD OF FORMING THE CHIP-ON-CHIP MOUNTING STRUCTURE Jan 31, 2011 Abandoned
Array ( [id] => 7666876 [patent_doc_number] => 20110316145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'NANO/MICRO-STRUCTURE AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/018444 [patent_app_country] => US [patent_app_date] => 2011-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2506 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13018444 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/018444
NANO/MICRO-STRUCTURE AND FABRICATION METHOD THEREOF Jan 31, 2011 Abandoned
Array ( [id] => 8321402 [patent_doc_number] => 20120193808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-02 [patent_title] => 'BONDED STACKED WAFERS AND METHODS OF ELECTROPLATING BONDED STACKED WAFERS' [patent_app_type] => utility [patent_app_number] => 13/018534 [patent_app_country] => US [patent_app_date] => 2011-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4730 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13018534 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/018534
Bonded stacked wafers and methods of electroplating bonded stacked wafers Jan 31, 2011 Issued
Array ( [id] => 8321400 [patent_doc_number] => 20120193809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-02 [patent_title] => 'INTEGRATED CIRCUIT DEVICE AND METHOD FOR PREPARING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/018790 [patent_app_country] => US [patent_app_date] => 2011-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4425 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13018790 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/018790
INTEGRATED CIRCUIT DEVICE AND METHOD FOR PREPARING THE SAME Jan 31, 2011 Abandoned
Array ( [id] => 10870239 [patent_doc_number] => 08895435 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-25 [patent_title] => 'Polysilicon layer and method of forming the same' [patent_app_type] => utility [patent_app_number] => 13/018009 [patent_app_country] => US [patent_app_date] => 2011-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3853 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13018009 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/018009
Polysilicon layer and method of forming the same Jan 30, 2011 Issued
Array ( [id] => 8321381 [patent_doc_number] => 20120193795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-02 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING AN AIRBRIDGE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/017414 [patent_app_country] => US [patent_app_date] => 2011-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4340 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13017414 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/017414
Semiconductor device having an airbridge and method of fabricating the same Jan 30, 2011 Issued
Array ( [id] => 6161367 [patent_doc_number] => 20110193204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/016611 [patent_app_country] => US [patent_app_date] => 2011-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6718 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20110193204.pdf [firstpage_image] =>[orig_patent_app_number] => 13016611 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/016611
SEMICONDUCTOR DEVICE Jan 27, 2011 Abandoned
Array ( [id] => 6057671 [patent_doc_number] => 20110113391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-12 [patent_title] => 'LAYOUT DESIGN TOOL' [patent_app_type] => utility [patent_app_number] => 13/006659 [patent_app_country] => US [patent_app_date] => 2011-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4441 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20110113391.pdf [firstpage_image] =>[orig_patent_app_number] => 13006659 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/006659
Layout design tool for semiconductor integrated circuit Jan 13, 2011 Issued
Array ( [id] => 5971122 [patent_doc_number] => 20110151622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/929160 [patent_app_country] => US [patent_app_date] => 2011-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9197 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20110151622.pdf [firstpage_image] =>[orig_patent_app_number] => 12929160 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/929160
Method of manufacturing semiconductor device Jan 4, 2011 Abandoned
Array ( [id] => 5979844 [patent_doc_number] => 20110095265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'NITRIDE SEMICONDUCTOR LIGHT EMITTING DEVICE' [patent_app_type] => utility [patent_app_number] => 12/983708 [patent_app_country] => US [patent_app_date] => 2011-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9456 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20110095265.pdf [firstpage_image] =>[orig_patent_app_number] => 12983708 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/983708
Nitride semiconductor light emitting device Jan 2, 2011 Issued
Array ( [id] => 7660260 [patent_doc_number] => 20110309529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-22 [patent_title] => 'MODULE SUBSTRATE THAT ALLOWS REPLACEMENT OF FAULTY CHIPS, SEMICONDUCTOR MODULE HAVING THE SAME, AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR MODULE' [patent_app_type] => utility [patent_app_number] => 12/980533 [patent_app_country] => US [patent_app_date] => 2010-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6370 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0309/20110309529.pdf [firstpage_image] =>[orig_patent_app_number] => 12980533 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/980533
Module substrate with feature for replacement of faulty chips, semiconductor module having the same, and method for manufacturing the semiconductor module Dec 28, 2010 Issued
Array ( [id] => 7787805 [patent_doc_number] => 20120049361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/980828 [patent_app_country] => US [patent_app_date] => 2010-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2729 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20120049361.pdf [firstpage_image] =>[orig_patent_app_number] => 12980828 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/980828
SEMICONDUCTOR INTEGRATED CIRCUIT Dec 28, 2010 Abandoned
Array ( [id] => 9621383 [patent_doc_number] => 08791558 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-29 [patent_title] => 'Stacked semiconductor package' [patent_app_type] => utility [patent_app_number] => 12/980772 [patent_app_country] => US [patent_app_date] => 2010-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4324 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12980772 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/980772
Stacked semiconductor package Dec 28, 2010 Issued
Array ( [id] => 9140922 [patent_doc_number] => 08581385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-12 [patent_title] => 'Semiconductor chip to dissipate heat, semiconductor package including the same, and stack package using the same' [patent_app_type] => utility [patent_app_number] => 12/979304 [patent_app_country] => US [patent_app_date] => 2010-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4803 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12979304 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/979304
Semiconductor chip to dissipate heat, semiconductor package including the same, and stack package using the same Dec 26, 2010 Issued
Array ( [id] => 9530643 [patent_doc_number] => 08754519 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-17 [patent_title] => 'Package for housing semiconductor element and semiconductor device using the same' [patent_app_type] => utility [patent_app_number] => 12/978813 [patent_app_country] => US [patent_app_date] => 2010-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 5017 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12978813 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/978813
Package for housing semiconductor element and semiconductor device using the same Dec 26, 2010 Issued
Array ( [id] => 6153795 [patent_doc_number] => 20110156258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING THROUGH VIA AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/978943 [patent_app_country] => US [patent_app_date] => 2010-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3427 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20110156258.pdf [firstpage_image] =>[orig_patent_app_number] => 12978943 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/978943
SEMICONDUCTOR DEVICE HAVING THROUGH VIA AND METHOD FOR FABRICATING THE SAME Dec 26, 2010 Abandoned
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