Search

Teresa M. Arroyo

Examiner (ID: 7429, Phone: (571)272-7260 , Office: P/2829 )

Most Active Art Unit
2826
Art Unit(s)
2893, 2826, 2503, 2811, 2829, 2822, 2881, 2508
Total Applications
972
Issued Applications
700
Pending Applications
81
Abandoned Applications
212

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9140922 [patent_doc_number] => 08581385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-12 [patent_title] => 'Semiconductor chip to dissipate heat, semiconductor package including the same, and stack package using the same' [patent_app_type] => utility [patent_app_number] => 12/979304 [patent_app_country] => US [patent_app_date] => 2010-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4803 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12979304 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/979304
Semiconductor chip to dissipate heat, semiconductor package including the same, and stack package using the same Dec 26, 2010 Issued
Array ( [id] => 9530643 [patent_doc_number] => 08754519 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-17 [patent_title] => 'Package for housing semiconductor element and semiconductor device using the same' [patent_app_type] => utility [patent_app_number] => 12/978813 [patent_app_country] => US [patent_app_date] => 2010-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 5017 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12978813 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/978813
Package for housing semiconductor element and semiconductor device using the same Dec 26, 2010 Issued
Array ( [id] => 8261897 [patent_doc_number] => 20120161321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'SEMICONDUCTOR DEVICE CONTACTS' [patent_app_type] => utility [patent_app_number] => 12/978359 [patent_app_country] => US [patent_app_date] => 2010-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5264 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12978359 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/978359
Semiconductor device contacts Dec 22, 2010 Issued
Array ( [id] => 8261879 [patent_doc_number] => 20120161312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'NON-SOLDER METAL BUMPS TO REDUCE PACKAGE HEIGHT' [patent_app_type] => utility [patent_app_number] => 12/978389 [patent_app_country] => US [patent_app_date] => 2010-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2979 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12978389 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/978389
NON-SOLDER METAL BUMPS TO REDUCE PACKAGE HEIGHT Dec 22, 2010 Abandoned
Array ( [id] => 8261891 [patent_doc_number] => 20120161319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'BALL GRID ARRAY METHOD AND STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/978144 [patent_app_country] => US [patent_app_date] => 2010-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4627 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12978144 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/978144
BALL GRID ARRAY METHOD AND STRUCTURE Dec 22, 2010 Abandoned
Array ( [id] => 8364179 [patent_doc_number] => 08253248 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-28 [patent_title] => 'Fabrication method of semiconductor device having conductive bumps' [patent_app_type] => utility [patent_app_number] => 12/956393 [patent_app_country] => US [patent_app_date] => 2010-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3763 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12956393 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/956393
Fabrication method of semiconductor device having conductive bumps Nov 29, 2010 Issued
Array ( [id] => 8398968 [patent_doc_number] => 08269355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-18 [patent_title] => 'Flexible contactless wire bonding structure and methodology for semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/941383 [patent_app_country] => US [patent_app_date] => 2010-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2289 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12941383 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/941383
Flexible contactless wire bonding structure and methodology for semiconductor device Nov 7, 2010 Issued
Array ( [id] => 6036495 [patent_doc_number] => 20110089544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-21 [patent_title] => 'PACKAGE, MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/893103 [patent_app_country] => US [patent_app_date] => 2010-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3264 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20110089544.pdf [firstpage_image] =>[orig_patent_app_number] => 12893103 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/893103
PACKAGE, MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR DEVICE Sep 28, 2010 Abandoned
Array ( [id] => 9844957 [patent_doc_number] => 08946877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-03 [patent_title] => 'Semiconductor package including cap' [patent_app_type] => utility [patent_app_number] => 12/893044 [patent_app_country] => US [patent_app_date] => 2010-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6855 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12893044 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/893044
Semiconductor package including cap Sep 28, 2010 Issued
Array ( [id] => 7717188 [patent_doc_number] => 20120007233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'SEMICONDUCTOR ELEMENT AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/893052 [patent_app_country] => US [patent_app_date] => 2010-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2508 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20120007233.pdf [firstpage_image] =>[orig_patent_app_number] => 12893052 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/893052
SEMICONDUCTOR ELEMENT AND FABRICATION METHOD THEREOF Sep 28, 2010 Abandoned
Array ( [id] => 8049683 [patent_doc_number] => 20120074573 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'SEMICONDUCTOR STRUCTURE AND METHOD FOR MAKING SAME' [patent_app_type] => utility [patent_app_number] => 12/892947 [patent_app_country] => US [patent_app_date] => 2010-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9245 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20120074573.pdf [firstpage_image] =>[orig_patent_app_number] => 12892947 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/892947
Semiconductor structure having metal oxide or nirtride passivation layer on fill layer and method for making same Sep 28, 2010 Issued
Array ( [id] => 9876064 [patent_doc_number] => 08963337 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-24 [patent_title] => 'Thin wafer support assembly' [patent_app_type] => utility [patent_app_number] => 12/893355 [patent_app_country] => US [patent_app_date] => 2010-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3043 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12893355 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/893355
Thin wafer support assembly Sep 28, 2010 Issued
Array ( [id] => 6114583 [patent_doc_number] => 20110074012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-31 [patent_title] => 'Substrate with built-in semiconductor element, and method of fabricating substrate with built-in semiconductor element' [patent_app_type] => utility [patent_app_number] => 12/923579 [patent_app_country] => US [patent_app_date] => 2010-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6658 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20110074012.pdf [firstpage_image] =>[orig_patent_app_number] => 12923579 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/923579
Substrate with built-in semiconductor element, and method of fabricating substrate with built-in semiconductor element Sep 27, 2010 Abandoned
Array ( [id] => 6027122 [patent_doc_number] => 20110079908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-07 [patent_title] => 'Stress buffer to protect device features' [patent_app_type] => utility [patent_app_number] => 12/924445 [patent_app_country] => US [patent_app_date] => 2010-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2434 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20110079908.pdf [firstpage_image] =>[orig_patent_app_number] => 12924445 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/924445
Stress buffer to protect device features Sep 27, 2010 Abandoned
Array ( [id] => 8049689 [patent_doc_number] => 20120074583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-29 [patent_title] => 'SEMICONDUCTOR STRUCTURE HAVING A THROUGH SUBSTRATE VIA (TSV) AND METHOD FOR FORMING' [patent_app_type] => utility [patent_app_number] => 12/892622 [patent_app_country] => US [patent_app_date] => 2010-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4565 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20120074583.pdf [firstpage_image] =>[orig_patent_app_number] => 12892622 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/892622
Semiconductor structure having a through substrate via (TSV) and method for forming Sep 27, 2010 Issued
Array ( [id] => 8859161 [patent_doc_number] => 08461698 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-06-11 [patent_title] => 'PCB external ground plane via conductive coating' [patent_app_type] => utility [patent_app_number] => 12/892617 [patent_app_country] => US [patent_app_date] => 2010-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3847 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12892617 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/892617
PCB external ground plane via conductive coating Sep 27, 2010 Issued
Array ( [id] => 6327450 [patent_doc_number] => 20100327293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'FIELD-EFFECT TRANSISTOR AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/880704 [patent_app_country] => US [patent_app_date] => 2010-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8182 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0327/20100327293.pdf [firstpage_image] =>[orig_patent_app_number] => 12880704 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/880704
Field-effect transistor Sep 12, 2010 Issued
Array ( [id] => 6610202 [patent_doc_number] => 20100323513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'FABRICATION METHOD OF SEMICONDUCTOR DEVICE HAVING CONDUCTIVE BUMPS' [patent_app_type] => utility [patent_app_number] => 12/872164 [patent_app_country] => US [patent_app_date] => 2010-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3685 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0323/20100323513.pdf [firstpage_image] =>[orig_patent_app_number] => 12872164 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/872164
Fabrication method of semiconductor device having conductive bumps Aug 30, 2010 Issued
Array ( [id] => 7787790 [patent_doc_number] => 20120049346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'Pillar Bumps and Process for Making Same' [patent_app_type] => utility [patent_app_number] => 12/871565 [patent_app_country] => US [patent_app_date] => 2010-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5455 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20120049346.pdf [firstpage_image] =>[orig_patent_app_number] => 12871565 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/871565
Pillar bumps and process for making same Aug 29, 2010 Issued
Array ( [id] => 7787803 [patent_doc_number] => 20120049359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'BALL GRID ARRAY PACKAGE' [patent_app_type] => utility [patent_app_number] => 12/871452 [patent_app_country] => US [patent_app_date] => 2010-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4131 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20120049359.pdf [firstpage_image] =>[orig_patent_app_number] => 12871452 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/871452
BALL GRID ARRAY PACKAGE Aug 29, 2010 Abandoned
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