
Teresa M. Arroyo
Examiner (ID: 7429, Phone: (571)272-7260 , Office: P/2829 )
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2893, 2826, 2503, 2811, 2829, 2822, 2881, 2508 |
| Total Applications | 972 |
| Issued Applications | 700 |
| Pending Applications | 81 |
| Abandoned Applications | 212 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4578801
[patent_doc_number] => 07825499
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-11-02
[patent_title] => 'Semiconductor package and trenched semiconductor power device using the same'
[patent_app_type] => utility
[patent_app_number] => 12/146924
[patent_app_country] => US
[patent_app_date] => 2008-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 15
[patent_no_of_words] => 6033
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/825/07825499.pdf
[firstpage_image] =>[orig_patent_app_number] => 12146924
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/146924 | Semiconductor package and trenched semiconductor power device using the same | Jun 25, 2008 | Issued |
Array
(
[id] => 5364920
[patent_doc_number] => 20090302479
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-10
[patent_title] => 'SEMICONDUCTOR STRUCTURES HAVING VIAS'
[patent_app_type] => utility
[patent_app_number] => 12/135014
[patent_app_country] => US
[patent_app_date] => 2008-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3341
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0302/20090302479.pdf
[firstpage_image] =>[orig_patent_app_number] => 12135014
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/135014 | SEMICONDUCTOR STRUCTURES HAVING VIAS | Jun 5, 2008 | Abandoned |
Array
(
[id] => 4836917
[patent_doc_number] => 20080277786
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-11-13
[patent_title] => 'Semiconductor package substrate'
[patent_app_type] => utility
[patent_app_number] => 12/156874
[patent_app_country] => US
[patent_app_date] => 2008-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2371
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0277/20080277786.pdf
[firstpage_image] =>[orig_patent_app_number] => 12156874
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/156874 | Semiconductor package substrate | Jun 4, 2008 | Abandoned |
Array
(
[id] => 8690573
[patent_doc_number] => 08390102
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-03-05
[patent_title] => 'Optoisolator leadframe assembly'
[patent_app_type] => utility
[patent_app_number] => 12/153543
[patent_app_country] => US
[patent_app_date] => 2008-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 2350
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 367
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12153543
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/153543 | Optoisolator leadframe assembly | May 20, 2008 | Issued |
Array
(
[id] => 5488283
[patent_doc_number] => 20090289354
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-11-26
[patent_title] => 'ELECTRONIC MODULE'
[patent_app_type] => utility
[patent_app_number] => 12/123784
[patent_app_country] => US
[patent_app_date] => 2008-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6866
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0289/20090289354.pdf
[firstpage_image] =>[orig_patent_app_number] => 12123784
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/123784 | Electronic module | May 19, 2008 | Issued |
Array
(
[id] => 5549918
[patent_doc_number] => 20090283904
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-11-19
[patent_title] => 'FLIPCHIP BUMP PATTERNS FOR EFFICIENT I-MESH POWER DISTRIBUTION SCHEMES'
[patent_app_type] => utility
[patent_app_number] => 12/121363
[patent_app_country] => US
[patent_app_date] => 2008-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1989
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0283/20090283904.pdf
[firstpage_image] =>[orig_patent_app_number] => 12121363
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/121363 | Flipchip bump patterns for efficient I-mesh power distribution schemes | May 14, 2008 | Issued |
Array
(
[id] => 8364176
[patent_doc_number] => 08253230
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-08-28
[patent_title] => 'Disabling electrical connections using pass-through 3D interconnects and associated systems and methods'
[patent_app_type] => utility
[patent_app_number] => 12/121654
[patent_app_country] => US
[patent_app_date] => 2008-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 4934
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12121654
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/121654 | Disabling electrical connections using pass-through 3D interconnects and associated systems and methods | May 14, 2008 | Issued |
Array
(
[id] => 5600
[patent_doc_number] => 07812464
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-10-12
[patent_title] => 'Semiconductor device and a method of manufacturing for high output MOSFET'
[patent_app_type] => utility
[patent_app_number] => 12/149183
[patent_app_country] => US
[patent_app_date] => 2008-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 51
[patent_no_of_words] => 11911
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 349
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/812/07812464.pdf
[firstpage_image] =>[orig_patent_app_number] => 12149183
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/149183 | Semiconductor device and a method of manufacturing for high output MOSFET | Apr 28, 2008 | Issued |
Array
(
[id] => 4433552
[patent_doc_number] => 07969005
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-06-28
[patent_title] => 'Packaging board, rewiring, roughened conductor for semiconductor module of a portable device, and manufacturing method therefor'
[patent_app_type] => utility
[patent_app_number] => 12/109811
[patent_app_country] => US
[patent_app_date] => 2008-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 19
[patent_no_of_words] => 8870
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/969/07969005.pdf
[firstpage_image] =>[orig_patent_app_number] => 12109811
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/109811 | Packaging board, rewiring, roughened conductor for semiconductor module of a portable device, and manufacturing method therefor | Apr 24, 2008 | Issued |
Array
(
[id] => 4856588
[patent_doc_number] => 20080265438
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-30
[patent_title] => 'LIQUID EPOXY RESIN COMPOSITION AND SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/109163
[patent_app_country] => US
[patent_app_date] => 2008-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 6135
[patent_no_of_claims] => 5
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0265/20080265438.pdf
[firstpage_image] =>[orig_patent_app_number] => 12109163
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/109163 | LIQUID EPOXY RESIN COMPOSITION AND SEMICONDUCTOR DEVICE | Apr 23, 2008 | Abandoned |
Array
(
[id] => 4857962
[patent_doc_number] => 20080266812
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-30
[patent_title] => 'Pressure-contact power semiconductor module and method for producing the same'
[patent_app_type] => utility
[patent_app_number] => 12/080624
[patent_app_country] => US
[patent_app_date] => 2008-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0266/20080266812.pdf
[firstpage_image] =>[orig_patent_app_number] => 12080624
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/080624 | Pressure-contact power semiconductor module and method for producing the same | Apr 3, 2008 | Issued |
Array
(
[id] => 4679936
[patent_doc_number] => 20080246162
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-09
[patent_title] => 'Stack package, a method of manufacturing the stack package, and a digital device having the stack package'
[patent_app_type] => utility
[patent_app_number] => 12/078694
[patent_app_country] => US
[patent_app_date] => 2008-04-04
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0246/20080246162.pdf
[firstpage_image] =>[orig_patent_app_number] => 12078694
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/078694 | Stack package, a method of manufacturing the stack package, and a digital device having the stack package | Apr 3, 2008 | Issued |
Array
(
[id] => 5432247
[patent_doc_number] => 20090166833
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-02
[patent_title] => 'SEMICONDUCTOR UNIT WHICH INCLUDES MULTIPLE CHIP PACKAGES INTEGRATED TOGETHER'
[patent_app_type] => utility
[patent_app_number] => 12/061914
[patent_app_country] => US
[patent_app_date] => 2008-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => publications/A1/0166/20090166833.pdf
[firstpage_image] =>[orig_patent_app_number] => 12061914
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/061914 | SEMICONDUCTOR UNIT WHICH INCLUDES MULTIPLE CHIP PACKAGES INTEGRATED TOGETHER | Apr 2, 2008 | Abandoned |
Array
(
[id] => 4679903
[patent_doc_number] => 20080246129
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-09
[patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/060484
[patent_app_country] => US
[patent_app_date] => 2008-04-01
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Array
(
[id] => 8233272
[patent_doc_number] => 08198714
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-06-12
[patent_title] => 'Method and system for configuring a transformer embedded in a multi-layer integrated circuit (IC) package'
[patent_app_type] => utility
[patent_app_number] => 12/057714
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[pdf_file] => patents/08/198/08198714.pdf
[firstpage_image] =>[orig_patent_app_number] => 12057714
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/057714 | Method and system for configuring a transformer embedded in a multi-layer integrated circuit (IC) package | Mar 27, 2008 | Issued |
Array
(
[id] => 5358178
[patent_doc_number] => 20090032972
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-02-05
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/057914
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/057914 | SEMICONDUCTOR DEVICE | Mar 27, 2008 | Abandoned |
Array
(
[id] => 4715374
[patent_doc_number] => 20080237896
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[patent_kind] => A1
[patent_issue_date] => 2008-10-02
[patent_title] => 'Wafer level packages capable of reducing chipping defect and manufacturing methods thereof'
[patent_app_type] => utility
[patent_app_number] => 12/076903
[patent_app_country] => US
[patent_app_date] => 2008-03-25
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[firstpage_image] =>[orig_patent_app_number] => 12076903
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/076903 | Encapsulated wafer level package with protection against damage and manufacturing method | Mar 24, 2008 | Issued |
Array
(
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[patent_issue_date] => 2012-06-05
[patent_title] => 'Semiconductor device, moisture-resistant frame, groove and method of producing semiconductor device'
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Array
(
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[patent_issue_date] => 2013-12-31
[patent_title] => 'Semiconductor device with wireless communication'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/053932 | Semiconductor device with wireless communication | Mar 23, 2008 | Issued |
Array
(
[id] => 4433630
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[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-06-28
[patent_title] => 'Die-to-die wire-bonding'
[patent_app_type] => utility
[patent_app_number] => 12/053253
[patent_app_country] => US
[patent_app_date] => 2008-03-21
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/969/07969022.pdf
[firstpage_image] =>[orig_patent_app_number] => 12053253
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/053253 | Die-to-die wire-bonding | Mar 20, 2008 | Issued |