Search

Teresa M. Arroyo

Examiner (ID: 6418, Phone: (571)272-7260 , Office: P/2829 )

Most Active Art Unit
2826
Art Unit(s)
2508, 2829, 2881, 2503, 2822, 2826, 2893, 2811
Total Applications
980
Issued Applications
703
Pending Applications
84
Abandoned Applications
214

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5256750 [patent_doc_number] => 20070210382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-13 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/703258 [patent_app_country] => US [patent_app_date] => 2007-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3595 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20070210382.pdf [firstpage_image] =>[orig_patent_app_number] => 11703258 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/703258
MOSFET having SOI and method Feb 6, 2007 Issued
Array ( [id] => 5098626 [patent_doc_number] => 20070181886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/701429 [patent_app_country] => US [patent_app_date] => 2007-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6295 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20070181886.pdf [firstpage_image] =>[orig_patent_app_number] => 11701429 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/701429
Hetero junction semiconductor device Feb 1, 2007 Issued
Array ( [id] => 4629859 [patent_doc_number] => 08008757 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-30 [patent_title] => 'Resinous hollow package and producing method thereof' [patent_app_type] => utility [patent_app_number] => 12/162504 [patent_app_country] => US [patent_app_date] => 2007-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 6176 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/008/08008757.pdf [firstpage_image] =>[orig_patent_app_number] => 12162504 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/162504
Resinous hollow package and producing method thereof Jan 29, 2007 Issued
Array ( [id] => 5095653 [patent_doc_number] => 20070117262 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-24 [patent_title] => 'Low Profile Stacking System and Method' [patent_app_type] => utility [patent_app_number] => 11/626316 [patent_app_country] => US [patent_app_date] => 2007-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3281 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20070117262.pdf [firstpage_image] =>[orig_patent_app_number] => 11626316 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/626316
Low Profile Stacking System and Method Jan 22, 2007 Abandoned
Array ( [id] => 5228176 [patent_doc_number] => 20070290283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-20 [patent_title] => 'Solar cell and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 11/648375 [patent_app_country] => US [patent_app_date] => 2006-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2668 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20070290283.pdf [firstpage_image] =>[orig_patent_app_number] => 11648375 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/648375
Solar cell, uneven surface on an insulation layer as a screen mesh pattern, and manufacturing method thereof Dec 27, 2006 Issued
Array ( [id] => 4971358 [patent_doc_number] => 20070111360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'Method for producing micromechanical structures and a micromechanical structure' [patent_app_type] => utility [patent_app_number] => 11/647659 [patent_app_country] => US [patent_app_date] => 2006-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3099 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20070111360.pdf [firstpage_image] =>[orig_patent_app_number] => 11647659 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/647659
Method for producing micromechanical structures and a micromechanical structure Dec 27, 2006 Abandoned
Array ( [id] => 5574131 [patent_doc_number] => 20090141492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-04 [patent_title] => 'LIGHT SOURCE APPARATUS, AND DISPLAY APPARATUS' [patent_app_type] => utility [patent_app_number] => 11/909033 [patent_app_country] => US [patent_app_date] => 2006-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12321 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20090141492.pdf [firstpage_image] =>[orig_patent_app_number] => 11909033 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/909033
Light source apparatus and display apparatus and white resist layer Dec 26, 2006 Issued
Array ( [id] => 4472409 [patent_doc_number] => 07944020 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-05-17 [patent_title] => 'Reverse MIM capacitor' [patent_app_type] => utility [patent_app_number] => 11/644535 [patent_app_country] => US [patent_app_date] => 2006-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 4541 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/944/07944020.pdf [firstpage_image] =>[orig_patent_app_number] => 11644535 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/644535
Reverse MIM capacitor Dec 21, 2006 Issued
Array ( [id] => 4986003 [patent_doc_number] => 20070152341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-05 [patent_title] => 'Copper wiring protected by capping metal layer and method for forming for the same' [patent_app_type] => utility [patent_app_number] => 11/641036 [patent_app_country] => US [patent_app_date] => 2006-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1406 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20070152341.pdf [firstpage_image] =>[orig_patent_app_number] => 11641036 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/641036
Copper wiring protected by capping metal layer and method for forming for the same Dec 18, 2006 Abandoned
Array ( [id] => 4582735 [patent_doc_number] => 07834359 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-16 [patent_title] => 'Electro-optical device, transferred chip, and transfer origin substrate' [patent_app_type] => utility [patent_app_number] => 11/640320 [patent_app_country] => US [patent_app_date] => 2006-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 10169 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/834/07834359.pdf [firstpage_image] =>[orig_patent_app_number] => 11640320 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/640320
Electro-optical device, transferred chip, and transfer origin substrate Dec 17, 2006 Issued
Array ( [id] => 4783933 [patent_doc_number] => 20080137262 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-12 [patent_title] => 'Methods and systems for capacitors' [patent_app_type] => utility [patent_app_number] => 11/637283 [patent_app_country] => US [patent_app_date] => 2006-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3597 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0137/20080137262.pdf [firstpage_image] =>[orig_patent_app_number] => 11637283 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/637283
Methods and systems for capacitors Dec 11, 2006 Abandoned
Array ( [id] => 4829324 [patent_doc_number] => 20080128829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-05 [patent_title] => 'Trench MOSFET with cell layout to improve ruggedness' [patent_app_type] => utility [patent_app_number] => 11/633366 [patent_app_country] => US [patent_app_date] => 2006-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1827 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20080128829.pdf [firstpage_image] =>[orig_patent_app_number] => 11633366 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/633366
Trench MOSFET with cell layout, ruggedness, truncated corners Dec 3, 2006 Issued
Array ( [id] => 7492464 [patent_doc_number] => 08030784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-04 [patent_title] => 'Semiconductor nanoparticle surface modification' [patent_app_type] => utility [patent_app_number] => 11/606895 [patent_app_country] => US [patent_app_date] => 2006-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4216 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/030/08030784.pdf [firstpage_image] =>[orig_patent_app_number] => 11606895 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/606895
Semiconductor nanoparticle surface modification Nov 30, 2006 Issued
Array ( [id] => 4488970 [patent_doc_number] => 07884426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-08 [patent_title] => 'Layout design method of semiconductor integrated circuit having well supplied with potential different from substrate potential' [patent_app_type] => utility [patent_app_number] => 11/591550 [patent_app_country] => US [patent_app_date] => 2006-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 4371 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/884/07884426.pdf [firstpage_image] =>[orig_patent_app_number] => 11591550 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/591550
Layout design method of semiconductor integrated circuit having well supplied with potential different from substrate potential Nov 1, 2006 Issued
Array ( [id] => 4936448 [patent_doc_number] => 20080073762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-27 [patent_title] => 'Semiconductor device package' [patent_app_type] => utility [patent_app_number] => 11/589721 [patent_app_country] => US [patent_app_date] => 2006-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5149 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20080073762.pdf [firstpage_image] =>[orig_patent_app_number] => 11589721 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/589721
Semiconductor device package Oct 30, 2006 Abandoned
Array ( [id] => 5004791 [patent_doc_number] => 20070202360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-30 [patent_title] => 'Gallium nitride material transistors and methods for wideband applications' [patent_app_type] => utility [patent_app_number] => 11/543010 [patent_app_country] => US [patent_app_date] => 2006-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8492 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20070202360.pdf [firstpage_image] =>[orig_patent_app_number] => 11543010 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/543010
Gallium nitride material transistors and methods for wideband applications Oct 3, 2006 Abandoned
Array ( [id] => 5168803 [patent_doc_number] => 20070069234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Nitride semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/525012 [patent_app_country] => US [patent_app_date] => 2006-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2859 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0069/20070069234.pdf [firstpage_image] =>[orig_patent_app_number] => 11525012 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/525012
Nitride semiconductor device Sep 21, 2006 Issued
Array ( [id] => 4936434 [patent_doc_number] => 20080073748 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-27 [patent_title] => 'Dielectric spacers for metal interconnects and method to form the same' [patent_app_type] => utility [patent_app_number] => 11/525709 [patent_app_country] => US [patent_app_date] => 2006-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5823 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20080073748.pdf [firstpage_image] =>[orig_patent_app_number] => 11525709 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/525709
Dielectric spacers for metal interconnects and method to form the same Sep 20, 2006 Issued
Array ( [id] => 4919345 [patent_doc_number] => 20080067657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-20 [patent_title] => 'Integrated circuit devices with multi-dimensional pad structures' [patent_app_type] => utility [patent_app_number] => 11/522985 [patent_app_country] => US [patent_app_date] => 2006-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 2974 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20080067657.pdf [firstpage_image] =>[orig_patent_app_number] => 11522985 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/522985
Integrated circuit devices with multi-dimensional pad structures Sep 18, 2006 Issued
Array ( [id] => 4800551 [patent_doc_number] => 20080012138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-17 [patent_title] => 'One-time-programmable anti-fuse formed using damascene process' [patent_app_type] => utility [patent_app_number] => 11/487849 [patent_app_country] => US [patent_app_date] => 2006-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4984 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20080012138.pdf [firstpage_image] =>[orig_patent_app_number] => 11487849 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/487849
One-time-programmable anti-fuse formed using damascene process Jul 16, 2006 Issued
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