
Teresa M. Arroyo
Examiner (ID: 7429, Phone: (571)272-7260 , Office: P/2829 )
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2893, 2826, 2503, 2811, 2829, 2822, 2881, 2508 |
| Total Applications | 972 |
| Issued Applications | 700 |
| Pending Applications | 81 |
| Abandoned Applications | 212 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3788955
[patent_doc_number] => 05821625
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-13
[patent_title] => 'Structure of chip on chip mounting preventing from crosstalk noise'
[patent_app_type] => 1
[patent_app_number] => 8/636651
[patent_app_country] => US
[patent_app_date] => 1996-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 42
[patent_no_of_words] => 6705
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/821/05821625.pdf
[firstpage_image] =>[orig_patent_app_number] => 636651
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/636651 | Structure of chip on chip mounting preventing from crosstalk noise | Apr 22, 1996 | Issued |
Array
(
[id] => 3821009
[patent_doc_number] => 05789815
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-04
[patent_title] => 'Three dimensional semiconductor package having flexible appendages'
[patent_app_type] => 1
[patent_app_number] => 8/636483
[patent_app_country] => US
[patent_app_date] => 1996-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2940
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/789/05789815.pdf
[firstpage_image] =>[orig_patent_app_number] => 636483
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/636483 | Three dimensional semiconductor package having flexible appendages | Apr 22, 1996 | Issued |
Array
(
[id] => 3816046
[patent_doc_number] => 05811876
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-22
[patent_title] => 'Semiconductor device with film carrier package structure'
[patent_app_type] => 1
[patent_app_number] => 8/636864
[patent_app_country] => US
[patent_app_date] => 1996-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 31
[patent_no_of_words] => 5588
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/811/05811876.pdf
[firstpage_image] =>[orig_patent_app_number] => 636864
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/636864 | Semiconductor device with film carrier package structure | Apr 22, 1996 | Issued |
Array
(
[id] => 3799848
[patent_doc_number] => 05780928
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-14
[patent_title] => 'Electronic system having fluid-filled and gas-filled thermal cooling of its semiconductor devices'
[patent_app_type] => 1
[patent_app_number] => 8/631704
[patent_app_country] => US
[patent_app_date] => 1996-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 18
[patent_no_of_words] => 11925
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 293
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/780/05780928.pdf
[firstpage_image] =>[orig_patent_app_number] => 631704
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/631704 | Electronic system having fluid-filled and gas-filled thermal cooling of its semiconductor devices | Apr 8, 1996 | Issued |
Array
(
[id] => 4020278
[patent_doc_number] => 05880530
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-09
[patent_title] => 'Multiregion solder interconnection structure'
[patent_app_type] => 1
[patent_app_number] => 8/625797
[patent_app_country] => US
[patent_app_date] => 1996-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2597
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/880/05880530.pdf
[firstpage_image] =>[orig_patent_app_number] => 625797
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/625797 | Multiregion solder interconnection structure | Mar 28, 1996 | Issued |
| 08/623301 | DESIGN AND PROCESS FOR MOUNTING DISCRETE COMPONENTS INSIDE AN INTEGRATED CIRCUIT PACKAGE FOR FREQUENCY GOVERNING OF MICROPROCESSORS | Mar 27, 1996 | Abandoned |
| 08/624691 | CASING FOR INTEGRATED CIRCUIT CHIPS AND METHOD OF FABRICATION | Mar 26, 1996 | Abandoned |
Array
(
[id] => 3874743
[patent_doc_number] => 05838062
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-17
[patent_title] => 'Corrosion-resistant lead frame'
[patent_app_type] => 1
[patent_app_number] => 8/625517
[patent_app_country] => US
[patent_app_date] => 1996-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 2461
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/838/05838062.pdf
[firstpage_image] =>[orig_patent_app_number] => 625517
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/625517 | Corrosion-resistant lead frame | Mar 25, 1996 | Issued |
Array
(
[id] => 3746061
[patent_doc_number] => 05786626
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-28
[patent_title] => 'Thin radio frequency transponder with leadframe antenna structure'
[patent_app_type] => 1
[patent_app_number] => 8/621784
[patent_app_country] => US
[patent_app_date] => 1996-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 28
[patent_no_of_words] => 6879
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/786/05786626.pdf
[firstpage_image] =>[orig_patent_app_number] => 621784
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/621784 | Thin radio frequency transponder with leadframe antenna structure | Mar 24, 1996 | Issued |
Array
(
[id] => 3812171
[patent_doc_number] => 05854508
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-29
[patent_title] => 'Semiconductor memory device having zigzag bonding pad arrangement'
[patent_app_type] => 1
[patent_app_number] => 8/618381
[patent_app_country] => US
[patent_app_date] => 1996-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 117
[patent_figures_cnt] => 162
[patent_no_of_words] => 50426
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/854/05854508.pdf
[firstpage_image] =>[orig_patent_app_number] => 618381
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/618381 | Semiconductor memory device having zigzag bonding pad arrangement | Mar 18, 1996 | Issued |
Array
(
[id] => 3892682
[patent_doc_number] => 05777380
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-07
[patent_title] => 'Resin sealing type semiconductor device having thin portions formed on the leads'
[patent_app_type] => 1
[patent_app_number] => 8/615869
[patent_app_country] => US
[patent_app_date] => 1996-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 7865
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/777/05777380.pdf
[firstpage_image] =>[orig_patent_app_number] => 615869
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/615869 | Resin sealing type semiconductor device having thin portions formed on the leads | Mar 13, 1996 | Issued |
Array
(
[id] => 3879535
[patent_doc_number] => 05763952
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-09
[patent_title] => 'Multi-layer tape having distinct signal, power and ground planes, semiconductor device assembly employing same, apparatus for and method of assembling same'
[patent_app_type] => 1
[patent_app_number] => 8/606243
[patent_app_country] => US
[patent_app_date] => 1996-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 21
[patent_no_of_words] => 13565
[patent_no_of_claims] => 47
[patent_no_of_ind_claims] => 24
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/763/05763952.pdf
[firstpage_image] =>[orig_patent_app_number] => 606243
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/606243 | Multi-layer tape having distinct signal, power and ground planes, semiconductor device assembly employing same, apparatus for and method of assembling same | Mar 7, 1996 | Issued |
Array
(
[id] => 3633385
[patent_doc_number] => 05686761
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-11
[patent_title] => 'Production worthy interconnect process for deep sub-half micrometer back-end-of-line technology'
[patent_app_type] => 1
[patent_app_number] => 8/608913
[patent_app_country] => US
[patent_app_date] => 1996-02-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2826
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/686/05686761.pdf
[firstpage_image] =>[orig_patent_app_number] => 608913
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/608913 | Production worthy interconnect process for deep sub-half micrometer back-end-of-line technology | Feb 28, 1996 | Issued |
Array
(
[id] => 4151011
[patent_doc_number] => RE036613
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-14
[patent_title] => 'Multi-chip stacked devices'
[patent_app_type] => 2
[patent_app_number] => 8/610127
[patent_app_country] => US
[patent_app_date] => 1996-02-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1785
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 25
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/RE/036/RE036613.pdf
[firstpage_image] =>[orig_patent_app_number] => 610127
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/610127 | Multi-chip stacked devices | Feb 28, 1996 | Issued |
Array
(
[id] => 3947776
[patent_doc_number] => 05982028
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-09
[patent_title] => 'Semiconductor device with good thermal behavior'
[patent_app_type] => 1
[patent_app_number] => 8/608491
[patent_app_country] => US
[patent_app_date] => 1996-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2692
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/982/05982028.pdf
[firstpage_image] =>[orig_patent_app_number] => 608491
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/608491 | Semiconductor device with good thermal behavior | Feb 27, 1996 | Issued |
Array
(
[id] => 3847326
[patent_doc_number] => 05708294
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-01-13
[patent_title] => 'Lead frame having oblique slits on a die pad'
[patent_app_type] => 1
[patent_app_number] => 8/605497
[patent_app_country] => US
[patent_app_date] => 1996-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2699
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/708/05708294.pdf
[firstpage_image] =>[orig_patent_app_number] => 605497
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/605497 | Lead frame having oblique slits on a die pad | Feb 25, 1996 | Issued |
Array
(
[id] => 3831165
[patent_doc_number] => 05783865
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-07-21
[patent_title] => 'Wiring substrate and semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/602423
[patent_app_country] => US
[patent_app_date] => 1996-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 20
[patent_no_of_words] => 7140
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/783/05783865.pdf
[firstpage_image] =>[orig_patent_app_number] => 602423
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/602423 | Wiring substrate and semiconductor device | Feb 15, 1996 | Issued |
Array
(
[id] => 3702388
[patent_doc_number] => 05677570
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-14
[patent_title] => 'Semiconductor integrated circuit devices for high-speed or high frequency'
[patent_app_type] => 1
[patent_app_number] => 8/602291
[patent_app_country] => US
[patent_app_date] => 1996-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 4039
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/677/05677570.pdf
[firstpage_image] =>[orig_patent_app_number] => 602291
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/602291 | Semiconductor integrated circuit devices for high-speed or high frequency | Feb 15, 1996 | Issued |
Array
(
[id] => 3896561
[patent_doc_number] => 05834849
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-10
[patent_title] => 'High density integrated circuit pad structures'
[patent_app_type] => 1
[patent_app_number] => 8/600339
[patent_app_country] => US
[patent_app_date] => 1996-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 1731
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/834/05834849.pdf
[firstpage_image] =>[orig_patent_app_number] => 600339
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/600339 | High density integrated circuit pad structures | Feb 12, 1996 | Issued |
Array
(
[id] => 3653335
[patent_doc_number] => 05640045
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-17
[patent_title] => 'Thermal stress minimization in power semiconductor devices'
[patent_app_type] => 1
[patent_app_number] => 8/597679
[patent_app_country] => US
[patent_app_date] => 1996-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 3754
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/640/05640045.pdf
[firstpage_image] =>[orig_patent_app_number] => 597679
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/597679 | Thermal stress minimization in power semiconductor devices | Feb 5, 1996 | Issued |