Search

Teresa M. Arroyo

Examiner (ID: 7429, Phone: (571)272-7260 , Office: P/2829 )

Most Active Art Unit
2826
Art Unit(s)
2893, 2826, 2503, 2811, 2829, 2822, 2881, 2508
Total Applications
972
Issued Applications
700
Pending Applications
81
Abandoned Applications
212

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3862132 [patent_doc_number] => 05705851 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-06 [patent_title] => 'Thermal ball lead integrated package' [patent_app_type] => 1 [patent_app_number] => 8/496043 [patent_app_country] => US [patent_app_date] => 1995-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2461 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/705/05705851.pdf [firstpage_image] =>[orig_patent_app_number] => 496043 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/496043
Thermal ball lead integrated package Jun 27, 1995 Issued
Array ( [id] => 3651955 [patent_doc_number] => 05637924 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-10 [patent_title] => 'Semiconductor device having planarized wiring with good thermal resistance' [patent_app_type] => 1 [patent_app_number] => 8/494265 [patent_app_country] => US [patent_app_date] => 1995-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4373 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/637/05637924.pdf [firstpage_image] =>[orig_patent_app_number] => 494265 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/494265
Semiconductor device having planarized wiring with good thermal resistance Jun 22, 1995 Issued
Array ( [id] => 3553722 [patent_doc_number] => 05548161 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-20 [patent_title] => 'Semiconductor apparatus capable of cooling a semiconductor element with low radiation efficiency' [patent_app_type] => 1 [patent_app_number] => 8/491240 [patent_app_country] => US [patent_app_date] => 1995-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 5379 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/548/05548161.pdf [firstpage_image] =>[orig_patent_app_number] => 491240 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/491240
Semiconductor apparatus capable of cooling a semiconductor element with low radiation efficiency Jun 15, 1995 Issued
08/490006 SEMICONDUCTOR DEVICE, METHOD FOR PRODUCING THEREOF AND LEAD FRAME USED THEREIN Jun 12, 1995 Abandoned
Array ( [id] => 3638265 [patent_doc_number] => 05610436 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-11 [patent_title] => 'Surface mount device with compensation for thermal expansion effects' [patent_app_type] => 1 [patent_app_number] => 8/486033 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 3858 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/610/05610436.pdf [firstpage_image] =>[orig_patent_app_number] => 486033 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/486033
Surface mount device with compensation for thermal expansion effects Jun 6, 1995 Issued
Array ( [id] => 3665261 [patent_doc_number] => 05656856 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Reduced noise semiconductor package stack' [patent_app_type] => 1 [patent_app_number] => 8/487323 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5602 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/656/05656856.pdf [firstpage_image] =>[orig_patent_app_number] => 487323 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/487323
Reduced noise semiconductor package stack Jun 6, 1995 Issued
Array ( [id] => 3847368 [patent_doc_number] => 05708297 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-13 [patent_title] => 'Thin multichip module' [patent_app_type] => 1 [patent_app_number] => 8/473722 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 56 [patent_no_of_words] => 16772 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/708/05708297.pdf [firstpage_image] =>[orig_patent_app_number] => 473722 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/473722
Thin multichip module Jun 6, 1995 Issued
08/479437 PACKING STRUCTURE OF SEMICONDUCTOR PACKAGES Jun 6, 1995 Abandoned
Array ( [id] => 3710673 [patent_doc_number] => 05654575 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-05 [patent_title] => 'TiSi.sub.2 /TiN clad interconnect technology' [patent_app_type] => 1 [patent_app_number] => 8/478571 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1748 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/654/05654575.pdf [firstpage_image] =>[orig_patent_app_number] => 478571 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/478571
TiSi.sub.2 /TiN clad interconnect technology Jun 6, 1995 Issued
08/476958 SLOTTED LEAD FOR A SEMICONDUCTOR DEVICE Jun 6, 1995 Abandoned
Array ( [id] => 3660227 [patent_doc_number] => 05623154 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-22 [patent_title] => 'Semiconductor device having triple diffusion' [patent_app_type] => 1 [patent_app_number] => 8/477697 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 36 [patent_no_of_words] => 7705 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/623/05623154.pdf [firstpage_image] =>[orig_patent_app_number] => 477697 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/477697
Semiconductor device having triple diffusion Jun 6, 1995 Issued
Array ( [id] => 3594892 [patent_doc_number] => 05567988 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-22 [patent_title] => 'Integrated circuit interconnect structure with back reflection suppressing electronic \"speed bumps\"' [patent_app_type] => 1 [patent_app_number] => 8/483113 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 4713 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/567/05567988.pdf [firstpage_image] =>[orig_patent_app_number] => 483113 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/483113
Integrated circuit interconnect structure with back reflection suppressing electronic "speed bumps" Jun 6, 1995 Issued
Array ( [id] => 3653029 [patent_doc_number] => 05684331 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-04 [patent_title] => 'Multilayered interconnection of semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/482001 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 88 [patent_no_of_words] => 4638 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/684/05684331.pdf [firstpage_image] =>[orig_patent_app_number] => 482001 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/482001
Multilayered interconnection of semiconductor device Jun 6, 1995 Issued
Array ( [id] => 3629859 [patent_doc_number] => 05621235 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-15 [patent_title] => 'TiSi.sub.2 /TiN clad interconnect technology' [patent_app_type] => 1 [patent_app_number] => 8/478569 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1745 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/621/05621235.pdf [firstpage_image] =>[orig_patent_app_number] => 478569 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/478569
TiSi.sub.2 /TiN clad interconnect technology Jun 6, 1995 Issued
Array ( [id] => 3624643 [patent_doc_number] => 05641987 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-24 [patent_title] => 'Heat spreader suitable for use in semiconductor packages having different pad sizes' [patent_app_type] => 1 [patent_app_number] => 8/479885 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3533 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/641/05641987.pdf [firstpage_image] =>[orig_patent_app_number] => 479885 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/479885
Heat spreader suitable for use in semiconductor packages having different pad sizes Jun 6, 1995 Issued
Array ( [id] => 3668686 [patent_doc_number] => 05598028 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-28 [patent_title] => 'Highly-planar interlayer dielectric thin films in integrated circuits' [patent_app_type] => 1 [patent_app_number] => 8/468282 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 14 [patent_no_of_words] => 2728 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/598/05598028.pdf [firstpage_image] =>[orig_patent_app_number] => 468282 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/468282
Highly-planar interlayer dielectric thin films in integrated circuits Jun 5, 1995 Issued
Array ( [id] => 3710894 [patent_doc_number] => 05654589 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-05 [patent_title] => 'Landing pad technology doubled up as local interconnect and borderless contact for deep sub-half micrometer IC application' [patent_app_type] => 1 [patent_app_number] => 8/466649 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 5273 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/654/05654589.pdf [firstpage_image] =>[orig_patent_app_number] => 466649 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/466649
Landing pad technology doubled up as local interconnect and borderless contact for deep sub-half micrometer IC application Jun 5, 1995 Issued
Array ( [id] => 3594796 [patent_doc_number] => 05567983 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-22 [patent_title] => 'Semiconductor apparatus capable of cooling a semiconductor element with radiation efficiency' [patent_app_type] => 1 [patent_app_number] => 8/466705 [patent_app_country] => US [patent_app_date] => 1995-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 5379 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/567/05567983.pdf [firstpage_image] =>[orig_patent_app_number] => 466705 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/466705
Semiconductor apparatus capable of cooling a semiconductor element with radiation efficiency Jun 5, 1995 Issued
Array ( [id] => 3662123 [patent_doc_number] => 05659201 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-19 [patent_title] => 'High conductivity interconnection line' [patent_app_type] => 1 [patent_app_number] => 8/463805 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4501 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/659/05659201.pdf [firstpage_image] =>[orig_patent_app_number] => 463805 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/463805
High conductivity interconnection line Jun 4, 1995 Issued
08/461460 SEMICONDUCTOR DEVICES AND METHOD FOR FABRICATING THE DEVICES Jun 4, 1995 Abandoned
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