
Terrell W. Fears
Examiner (ID: 19115)
| Most Active Art Unit | 2303 |
| Art Unit(s) | 2312, 2811, 2511, 2303, 2305, 2824, 1613, 2818, 2504, 2603, 2899 |
| Total Applications | 1964 |
| Issued Applications | 1841 |
| Pending Applications | 23 |
| Abandoned Applications | 100 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4010463
[patent_doc_number] => 05923583
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-13
[patent_title] => 'Ferromagnetic memory based on torroidal elements'
[patent_app_type] => 1
[patent_app_number] => 8/956405
[patent_app_country] => US
[patent_app_date] => 1997-10-23
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[pdf_file] => patents/05/923/05923583.pdf
[firstpage_image] =>[orig_patent_app_number] => 956405
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/956405 | Ferromagnetic memory based on torroidal elements | Oct 22, 1997 | Issued |
Array
(
[id] => 4073214
[patent_doc_number] => 05896322
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[patent_kind] => NA
[patent_issue_date] => 1999-04-20
[patent_title] => 'Multiple-port ring buffer'
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[patent_app_number] => 8/956710
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[patent_app_date] => 1997-10-23
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[firstpage_image] =>[orig_patent_app_number] => 956710
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/956710 | Multiple-port ring buffer | Oct 22, 1997 | Issued |
Array
(
[id] => 3993940
[patent_doc_number] => 05910923
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[patent_kind] => NA
[patent_issue_date] => 1999-06-08
[patent_title] => 'Memory access circuits for test time reduction'
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[patent_app_number] => 8/956410
[patent_app_country] => US
[patent_app_date] => 1997-10-23
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[pdf_file] => patents/05/910/05910923.pdf
[firstpage_image] =>[orig_patent_app_number] => 956410
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/956410 | Memory access circuits for test time reduction | Oct 22, 1997 | Issued |
Array
(
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[patent_doc_number] => 05923606
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[patent_kind] => NA
[patent_issue_date] => 1999-07-13
[patent_title] => 'NOR-type mask ROM having dual sense current paths'
[patent_app_type] => 1
[patent_app_number] => 8/954905
[patent_app_country] => US
[patent_app_date] => 1997-10-21
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[firstpage_image] =>[orig_patent_app_number] => 954905
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/954905 | NOR-type mask ROM having dual sense current paths | Oct 20, 1997 | Issued |
Array
(
[id] => 3873396
[patent_doc_number] => 05796665
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-18
[patent_title] => 'Semiconductor memory device with improved read signal generation of data lines and assisted precharge to mid-level'
[patent_app_type] => 1
[patent_app_number] => 8/958205
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[patent_app_date] => 1997-10-17
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[pdf_file] => patents/05/796/05796665.pdf
[firstpage_image] =>[orig_patent_app_number] => 958205
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/958205 | Semiconductor memory device with improved read signal generation of data lines and assisted precharge to mid-level | Oct 16, 1997 | Issued |
Array
(
[id] => 3770451
[patent_doc_number] => 05852576
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[patent_kind] => NA
[patent_issue_date] => 1998-12-22
[patent_title] => 'High voltage NMOS pass gate for integrated circuit with high voltage generator and flash non-volatile memory device having the pass gate'
[patent_app_type] => 1
[patent_app_number] => 8/944904
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[pdf_file] => patents/05/852/05852576.pdf
[firstpage_image] =>[orig_patent_app_number] => 944904
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/944904 | High voltage NMOS pass gate for integrated circuit with high voltage generator and flash non-volatile memory device having the pass gate | Oct 5, 1997 | Issued |
Array
(
[id] => 4077427
[patent_doc_number] => 05867420
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-02
[patent_title] => 'Reducing oxidation stress in the fabrication of devices'
[patent_app_type] => 1
[patent_app_number] => 8/943910
[patent_app_country] => US
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[pdf_file] => patents/05/867/05867420.pdf
[firstpage_image] =>[orig_patent_app_number] => 943910
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/943910 | Reducing oxidation stress in the fabrication of devices | Sep 29, 1997 | Issued |
Array
(
[id] => 3798028
[patent_doc_number] => 05822251
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-13
[patent_title] => 'Expandable flash-memory mass-storage using shared buddy lines and intermediate flash-bus between device-specific buffers and flash-intelligent DMA controllers'
[patent_app_type] => 1
[patent_app_number] => 8/939601
[patent_app_country] => US
[patent_app_date] => 1997-09-29
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/822/05822251.pdf
[firstpage_image] =>[orig_patent_app_number] => 939601
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/939601 | Expandable flash-memory mass-storage using shared buddy lines and intermediate flash-bus between device-specific buffers and flash-intelligent DMA controllers | Sep 28, 1997 | Issued |
Array
(
[id] => 3940226
[patent_doc_number] => 05953264
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-14
[patent_title] => 'Redundant memory cell selecting circuit having fuses coupled to memory cell group address and memory cell block address'
[patent_app_type] => 1
[patent_app_number] => 8/937006
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[patent_app_date] => 1997-09-24
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[firstpage_image] =>[orig_patent_app_number] => 937006
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/937006 | Redundant memory cell selecting circuit having fuses coupled to memory cell group address and memory cell block address | Sep 23, 1997 | Issued |
Array
(
[id] => 3845866
[patent_doc_number] => 05815455
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-29
[patent_title] => 'Power supply interface circuit providing nonvolatile storage with suitable operating and standby voltage levels'
[patent_app_type] => 1
[patent_app_number] => 8/933701
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[patent_app_date] => 1997-09-19
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/933701 | Power supply interface circuit providing nonvolatile storage with suitable operating and standby voltage levels | Sep 18, 1997 | Issued |
Array
(
[id] => 3789378
[patent_doc_number] => 05808951
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[patent_issue_date] => 1998-09-15
[patent_title] => 'Semiconductor memory'
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[firstpage_image] =>[orig_patent_app_number] => 951206
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/951206 | Semiconductor memory | Sep 16, 1997 | Issued |
Array
(
[id] => 3853554
[patent_doc_number] => 05847999
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[patent_issue_date] => 1998-12-08
[patent_title] => 'Integrated circuit memory devices having variable block size erase capability'
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[pdf_file] => patents/05/847/05847999.pdf
[firstpage_image] =>[orig_patent_app_number] => 927605
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/927605 | Integrated circuit memory devices having variable block size erase capability | Sep 11, 1997 | Issued |
Array
(
[id] => 3802454
[patent_doc_number] => 05841705
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[patent_title] => 'Semiconductor memory device having controllable supplying capability of internal voltage'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/924501 | Semiconductor memory device having controllable supplying capability of internal voltage | Sep 4, 1997 | Issued |
Array
(
[id] => 3998684
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[patent_title] => 'Integrated circuit memory devices including unidirectionally-oriented sub-blocks'
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Array
(
[id] => 3752028
[patent_doc_number] => 05787035
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[patent_title] => 'Memory cell array'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/924005 | Memory cell array | Aug 28, 1997 | Issued |
Array
(
[id] => 4034370
[patent_doc_number] => 05926411
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[patent_issue_date] => 1999-07-20
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/920847 | Optical random access memory | Aug 28, 1997 | Issued |
Array
(
[id] => 3792247
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/916604 | Voltage pump switch | Aug 21, 1997 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/918508 | Memory device with efficient redundancy using sense amplifiers | Aug 21, 1997 | Issued |