Search

Terrell W. Fears

Examiner (ID: 19115)

Most Active Art Unit
2303
Art Unit(s)
2312, 2811, 2511, 2303, 2305, 2824, 1613, 2818, 2504, 2603, 2899
Total Applications
1964
Issued Applications
1841
Pending Applications
23
Abandoned Applications
100

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3790035 [patent_doc_number] => 05757700 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/805504 [patent_app_country] => US [patent_app_date] => 1997-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8644 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/757/05757700.pdf [firstpage_image] =>[orig_patent_app_number] => 805504 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/805504
Semiconductor memory device Feb 25, 1997 Issued
Array ( [id] => 3756748 [patent_doc_number] => 05801996 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Data path for high speed high bandwidth DRAM' [patent_app_type] => 1 [patent_app_number] => 8/806206 [patent_app_country] => US [patent_app_date] => 1997-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 3514 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/801/05801996.pdf [firstpage_image] =>[orig_patent_app_number] => 806206 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/806206
Data path for high speed high bandwidth DRAM Feb 25, 1997 Issued
Array ( [id] => 3792600 [patent_doc_number] => 05818792 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'Semiconductor memory device and memory module using the same' [patent_app_type] => 1 [patent_app_number] => 8/804683 [patent_app_country] => US [patent_app_date] => 1997-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 14239 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/818/05818792.pdf [firstpage_image] =>[orig_patent_app_number] => 804683 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/804683
Semiconductor memory device and memory module using the same Feb 24, 1997 Issued
Array ( [id] => 3789298 [patent_doc_number] => 05808945 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Semiconductor memory having redundant memory array' [patent_app_type] => 1 [patent_app_number] => 8/802610 [patent_app_country] => US [patent_app_date] => 1997-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 8067 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/808/05808945.pdf [firstpage_image] =>[orig_patent_app_number] => 802610 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/802610
Semiconductor memory having redundant memory array Feb 18, 1997 Issued
Array ( [id] => 3770538 [patent_doc_number] => 05852582 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-22 [patent_title] => 'Non-volatile storage device refresh time detector' [patent_app_type] => 1 [patent_app_number] => 8/801305 [patent_app_country] => US [patent_app_date] => 1997-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3709 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/852/05852582.pdf [firstpage_image] =>[orig_patent_app_number] => 801305 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/801305
Non-volatile storage device refresh time detector Feb 17, 1997 Issued
Array ( [id] => 3874048 [patent_doc_number] => 05793697 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Read circuit for magnetic memory array using magnetic tunnel junction devices' [patent_app_type] => 1 [patent_app_number] => 8/801271 [patent_app_country] => US [patent_app_date] => 1997-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 7410 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/793/05793697.pdf [firstpage_image] =>[orig_patent_app_number] => 801271 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/801271
Read circuit for magnetic memory array using magnetic tunnel junction devices Feb 17, 1997 Issued
Array ( [id] => 3835916 [patent_doc_number] => 05732011 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-24 [patent_title] => 'Digital system having high speed buffering' [patent_app_type] => 1 [patent_app_number] => 8/801908 [patent_app_country] => US [patent_app_date] => 1997-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3049 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/732/05732011.pdf [firstpage_image] =>[orig_patent_app_number] => 801908 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/801908
Digital system having high speed buffering Feb 13, 1997 Issued
Array ( [id] => 3756905 [patent_doc_number] => 05717645 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-10 [patent_title] => 'Random access memory with fast, compact sensing and selection architecture' [patent_app_type] => 1 [patent_app_number] => 8/797810 [patent_app_country] => US [patent_app_date] => 1997-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5950 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/717/05717645.pdf [firstpage_image] =>[orig_patent_app_number] => 797810 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/797810
Random access memory with fast, compact sensing and selection architecture Feb 6, 1997 Issued
Array ( [id] => 3807983 [patent_doc_number] => 05781492 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-14 [patent_title] => 'System and method for mapping memory to DRAM after system boot from non-volatile memory' [patent_app_type] => 1 [patent_app_number] => 8/808609 [patent_app_country] => US [patent_app_date] => 1997-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3011 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/781/05781492.pdf [firstpage_image] =>[orig_patent_app_number] => 808609 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/808609
System and method for mapping memory to DRAM after system boot from non-volatile memory Feb 3, 1997 Issued
Array ( [id] => 1443050 [patent_doc_number] => 06335896 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-01 [patent_title] => 'Dynamic random access memory' [patent_app_type] => B1 [patent_app_number] => 08/792419 [patent_app_country] => US [patent_app_date] => 1997-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 93 [patent_figures_cnt] => 103 [patent_no_of_words] => 20883 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/335/06335896.pdf [firstpage_image] =>[orig_patent_app_number] => 08792419 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/792419
Dynamic random access memory Feb 2, 1997 Issued
Array ( [id] => 3816034 [patent_doc_number] => 05854763 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-29 [patent_title] => 'Integrated circuit with non-binary decoding and data access' [patent_app_type] => 1 [patent_app_number] => 8/792501 [patent_app_country] => US [patent_app_date] => 1997-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4353 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/854/05854763.pdf [firstpage_image] =>[orig_patent_app_number] => 792501 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/792501
Integrated circuit with non-binary decoding and data access Jan 30, 1997 Issued
Array ( [id] => 3753301 [patent_doc_number] => 05754477 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Differential flash memory cell and method for programming' [patent_app_type] => 1 [patent_app_number] => 8/790902 [patent_app_country] => US [patent_app_date] => 1997-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4065 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754477.pdf [firstpage_image] =>[orig_patent_app_number] => 790902 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/790902
Differential flash memory cell and method for programming Jan 28, 1997 Issued
Array ( [id] => 3843719 [patent_doc_number] => 05740104 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Multi-state flash memory cell and method for programming single electron differences' [patent_app_type] => 1 [patent_app_number] => 8/790903 [patent_app_country] => US [patent_app_date] => 1997-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2885 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/740/05740104.pdf [firstpage_image] =>[orig_patent_app_number] => 790903 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/790903
Multi-state flash memory cell and method for programming single electron differences Jan 28, 1997 Issued
Array ( [id] => 3890257 [patent_doc_number] => 05729500 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-17 [patent_title] => 'Draw with variable internal operation frequency' [patent_app_type] => 1 [patent_app_number] => 8/789803 [patent_app_country] => US [patent_app_date] => 1997-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 58 [patent_no_of_words] => 7157 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/729/05729500.pdf [firstpage_image] =>[orig_patent_app_number] => 789803 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/789803
Draw with variable internal operation frequency Jan 27, 1997 Issued
Array ( [id] => 3888712 [patent_doc_number] => 05764573 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Semiconductor device capable of externally and readily identifying set bonding optional function and method of identifying internal function of semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/787803 [patent_app_country] => US [patent_app_date] => 1997-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 9542 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/764/05764573.pdf [firstpage_image] =>[orig_patent_app_number] => 787803 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/787803
Semiconductor device capable of externally and readily identifying set bonding optional function and method of identifying internal function of semiconductor device Jan 22, 1997 Issued
Array ( [id] => 3915094 [patent_doc_number] => 05898608 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-27 [patent_title] => 'Method for operating a ferroelectric memory' [patent_app_type] => 1 [patent_app_number] => 8/787833 [patent_app_country] => US [patent_app_date] => 1997-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 50 [patent_no_of_words] => 25197 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/898/05898608.pdf [firstpage_image] =>[orig_patent_app_number] => 787833 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/787833
Method for operating a ferroelectric memory Jan 22, 1997 Issued
Array ( [id] => 3830720 [patent_doc_number] => 05790470 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-04 [patent_title] => 'Decoder circuit having a predecoder acitivated by a reset signal' [patent_app_type] => 1 [patent_app_number] => 8/785601 [patent_app_country] => US [patent_app_date] => 1997-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4616 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/790/05790470.pdf [firstpage_image] =>[orig_patent_app_number] => 785601 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/785601
Decoder circuit having a predecoder acitivated by a reset signal Jan 16, 1997 Issued
Array ( [id] => 3912921 [patent_doc_number] => 05751638 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-12 [patent_title] => 'Mail-box design for non-blocking communication across ports of a multi-port device' [patent_app_type] => 1 [patent_app_number] => 8/786401 [patent_app_country] => US [patent_app_date] => 1997-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 40 [patent_no_of_words] => 22944 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/751/05751638.pdf [firstpage_image] =>[orig_patent_app_number] => 786401 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/786401
Mail-box design for non-blocking communication across ports of a multi-port device Jan 16, 1997 Issued
Array ( [id] => 3898989 [patent_doc_number] => 05724300 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-03 [patent_title] => 'Non-volatile semiconductor memory device and memory system using the same' [patent_app_type] => 1 [patent_app_number] => 8/784927 [patent_app_country] => US [patent_app_date] => 1997-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 99 [patent_figures_cnt] => 132 [patent_no_of_words] => 28749 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/724/05724300.pdf [firstpage_image] =>[orig_patent_app_number] => 784927 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/784927
Non-volatile semiconductor memory device and memory system using the same Jan 15, 1997 Issued
Array ( [id] => 4193778 [patent_doc_number] => 06021063 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Method and structure for improving data retention in a DRAM' [patent_app_type] => 1 [patent_app_number] => 8/782603 [patent_app_country] => US [patent_app_date] => 1997-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2811 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/021/06021063.pdf [firstpage_image] =>[orig_patent_app_number] => 782603 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/782603
Method and structure for improving data retention in a DRAM Jan 12, 1997 Issued
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